• 조명전기설비학회논문지
• /
• 제17권4호
• /
• pp.116-125
• /
• 2003

21세기에는 컴퓨터, 지상파방송, 위성방송, CATV 등의 모든 전기통신매체를 통합한 멀티미디어 TV가 출현할 것으로 예상되고 있다. 따라서 고전력 광대역 고주파수를 동시에 수용할 수 있는 디지털 텔레비전용 전기통신설비가 필요하다. 본 연구에서 제시한 모델은 2-tone 신호에 의한 일반적인 성능평가와 실제 시스템과 동일한 경우를 고찰하기 위한 8-VSB 신호를 사용하여 측정하고 분석 및 평가하였다. 이 결과 제시한 고전력증폭기는 디지털 텔레비전 옥·내외 송신 설비용 전기통신의 주요장치에서 요구되는 고전력, 광대역, 고주파수의 규격을 동시에 만족함을 확인하였다.

• 정보저장시스템학회논문집
• /
• 제1권2호
• /
• pp.155-160
• /
• 2005

In this paper, the channel decoder promising reliable data retrieving in noisy holographic channel has been developed for holographic WORM(write once read many) system. It covers various DSP(digital signal processing) blocks, such as align mark detector, adaptive channel equalizer, modulation decoder and ECC(error correction code) decoder. The specific schemes of DSP are designed to reduce the effect of noises in holographic WORM(H-WORM) system, particularly in prototype of DAEWOO electronics(DEPROTO). For real time data retrieving, the channel decoder is redesigned for FPGA(field programmable gate array) based hardware, where DSP blocks calculate in parallel sense with memory buffers between blocks and controllers for driving peripherals of FPGA. As an input source of the experiments, MPEG2 TS(transport stream) data was used and recorded to DEPROTO system. During retrieving, the CCD(charge coupled device), capturing device of DEPROTO, detects retrieved images and transmits signals of them to the FPGA of hardware channel decoder. Finally, the output data stream of the channel decoder was transferred to the MPEG decoding board for monitoring video signals. The experimental results showed the error corrected BER(bit error rate) of less than $10^{-9}$, from the raw BER of DEPROTO, about $10^{-3}$. With the developed hardware channel decoder, the real-time video demonstration was possible during the experiments. The operating clock of the FPGA was 60 MHz, of which speed was capable of decoding up to 120 mega channel bits per sec.

• 대한의용생체공학회:의공학회지
• /
• 제28권6호
• /
• pp.756-767
• /
• 2007

For the combination of phosphor screens having various thicknesses and a photodiode array manufactured by complementary metal-oxide-semiconductor (CMOS) process, we report the observation of image-quality degradation under the irradiation of 45-kVp spectrum x rays. The image quality was assessed in terms of dark pixel signal, dynamic range, modulation-transfer function (MTF), noise-power spectrum (NPS), and detective quantum efficiency (DQE). For the accumulation of the absorbed dose, the radiation-induced increase both in dark signal and noise resulted in the gradual reduction in dynamic range. While the MTF was only slightly affected by the total ionizing dose, the noise power in the case of $Min-R^{TM}$ screen, which is the thinnest one among the considered screens in this study, became larger as the total dose was increased. This is caused by incomplete correction of the dark current fixed-pattern noise. In addition, the increase tendency in NPS was independent of the spatial frequency. For the cascaded model analysis, the additional noise source is from direct absorption of x-ray photons. The change in NPS with respect to the total dose degrades the DQE. However, with carefully updated and applied correction, we can overcome the detrimental effects of increased dark current on NPS and DQE. This study gives an initial motivation that the periodic monitoring of the image-quality degradation is an important issue for the long-term and healthy use of digital x-ray imaging detectors.

• 한국정밀공학회:학술대회논문집
• /
• 한국정밀공학회 2004년도 추계학술대회 논문집
• /
• pp.1406-1409
• /
• 2004

The Resolver usually used in industry is the absolute angle analog sensor that must be in order to driving BLDC (brushless DC) motor, and it needs RDC(Resolver-to-Digital converter) for changing the output signal to digital to be applied to the SVPWM(Space Vector Pulse Width Modulation) algorithm. Commonly used S/W RDC needs trigonometric function. What it takes a lot of calculation time of processor is gotten at weak point. In this paper, S/W RDC is realized except trigonometric functions as a result of feedback resolver outputs after filtering using FIR filter. thus, processing time is reduced. So, One-chip DSP Controller operating the Vector Control, RDC, and SVPWM can be designed.

• 전기학회논문지P
• /
• 제56권3호
• /
• pp.136-141
• /
• 2007

In this paper, a new simple control method for active power filter which can realized the complete compensation of the harmonic currents is proposed. In the proposed scheme, a compensating current reference generator employing resonance model implemented by a DSP(Digital Signal Processor) is introduced. Deadbeat control is employed to control the active power filter. The switching pulse width based SVM(Space Vector Modulation) is adopted so that the current of active power filter is been exactly equal to its reference at the next sampling instant. To compensate the computation delay of digital controller, the prediction of current is achieved by the current observer with deadbeat response.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 1999년도 전력전자학술대회 논문집
• /
• pp.350-353
• /
• 1999

In this paper, a new simple control method for active power filter which can realized the complete compensation of the harmonic currents is proposed. In the proposed scheme, a compensating current reference generator employing lossless resonato implemented by a DSP(Digital Signal Processor) is introduced. Deadbeat control is employed to contro the active power filter. The switching pulse width based SVM(Space Vector Modulation) is adopted so that the current of active power filter is been exactly equal to its reference at the next sampling instant. To compensate the computation delay of digital controller, the prediction of current is achieved by the current observer with deadbeat response.

• 전자공학회논문지A
• /
• 제32A권1호
• /
• pp.1-13
• /
• 1995

In this paper, a specification for wireless LAN MODEM using direct sequence spread spectrum (DS/SS) technique is presented. Some algorithms and hardware architectures for an efficient implementation of the DS/SS MODEM are suggested. In the method, all baseband signal processing are done digitally for single chip implementation. Schemes of DQPSK baseband modulation/demodulation, despreading with digital matched filter, digital timing recovery, and efficient carrier sensing are among the discussed algorithms. We also performed various kinds of simulations to evaluate the system performance and to extract parameters for hardware implementation. In addition, the pictorial view of ASIC of the SS MODEM is also shown.

• 디지털산업정보학회논문지
• /
• 제8권1호
• /
• pp.147-155
• /
• 2012

Fountain codes ensure reliability and robustness for time varying channels in wireless communication. In this paper, the concatenated fountain codes for AWGN and slow fading channels are investigated. Wireless system model, which includes the concatenated fountain code and modulation, is proposed. Maximum achievable rate is used for analyzing the performance of the system model for AWGN and fading channels. Belief Propagation (BP) algorithm is used for exploiting the soft information received at the decoder. Simulation results show that, concatenated fountain codes performs significantly better than that of a conventional Fountain codes with large packet lengths for higher Signal to Noise Ratio (SNR) in slow fading channels.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2002년도 하계종합학술대회 논문집(5)
• /
• pp.219-222
• /
• 2002

There are screw, reciprocating type turbo compressor by structure in an air compressor which is essential equipment on the industrial spot. Recently, the application range of a turbo compressor tend to be wide gradually. And this type of compressor needs high speed rotation of impeller in structure so high ratio gearbox and conventional induction motor driving required. This mechanical system have results of increased moment of inertia and mechanical friction loss. Recent studies of modern turbo compressor have been applied to developing super high speed BLDC motor and driver which remove gearbox that make its size small and mechanical friction loss minimum. To accomodate this tendency, we tried to develope a super high speed motor drive system for 150Hp, 70,000rpm direct drive Turbo compressor using DSP(Digital Signal Processor) and SVPWM(Space Vector Modulation PWM) technique. The results of this specific application show that super high speed driver and controller could be implemented well with digital electronics.

• 한국통신학회논문지
• /
• 제33권2A호
• /
• pp.148-158
• /
• 2008

본 논문에서는 M-ary 변조 방식을 사용하는 적응형 전송 시스템에서 효율적으로 사용할 수 있는 신호 대 잡음비 추정 알고리즘 및 하드웨어 구현 결과를 소개한다. 본 논문에서는 제안된 방식을 차세대 위성방송 규격인 DVB-S2 시스템에서 효과적으로 동작할 수 있도록 설계된 결과를 소개하며, 본 논문에서 제안된 방식은 향후 적응형 전송 방식을 사용하는 다른 디지털 통신 시스템에서도 용이하게 적용이 가능하다. 제안된 알고리즘은 수신신호의 분포에 대한 이론적 배경을 바탕으로 설계된 룩업테이블을 이용하여, 하드웨어 구현시 두 개의 비교기와 카운터를 이용하여 신호 대 잡음비 추정이 가능하다. 따라서, 제안된 알고리즘에 의해 고안된 하드웨어는 복잡도가 현저히 낮으면서도 높은 정확도를 가진다. 본 논문에서 살펴본 시뮬레이션 결과에 따르면 제안된 추정기는 DVB-S2 시스템에서 규정된 신호대 잡음비 추정 범위 내에서 약 1 dB의 추정오류를 만족하기 위하여 수 백 개의 샘플만을 필요로 한다.