• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.2010-2011
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• 2007

Rogowski Coil Current Transformer using PCB(Printed Circuit Board) is produced to analyze characteristics of digital C.T(Current Transformer). Conclusively, this paper expresses a difference and a good point of C.T using PCB.

• Journal of the Semiconductor & Display Technology
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• v.15 no.2
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• pp.55-60
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• 2016

This study was developed through the secondary battery module charging/discharger possible utilization in the production process equipment circuit. The developed module is ensuring construction of efficient and productive charging and discharger through this research a limit on the yield and the price of existing single -channel charge and discharger circuit as a 5V 70A grade secondary battery Formation charge and discharger for up to 1 board 4 channels. In order to improve the sensing accuracy, through a robust differential amplifier circuit described using 16bit Analog-Digital Converter and noise was secured 16bit resolution sensing. The configuration also made demands for property Rise / Fall Time. Data Acquisition, discharge efficiency and also to fit the sink circuit temperature level for mass production.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.6
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• pp.138-144
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• 2013

In XRF systems, various techniques have been developed for the synthesis of pulse shapes using digital methods instead of traditional analog methods. Trapezoidal pulse shaping algorithms can be used for digital multi-channel pulse height analysis in X-ray spectrometer systems. In this paper, an efficient trapezoidal filter architecture is presented. In addition, we present a hardware-efficient peak value detection algorithm. By the proposed algorithm, peak value detection error is decreased by half compared with the conventional algorithm. The proposed Digital Pulse Processing(DPP) algorithm is designed using Verilog HDL and implemented using an FPGA on a test board. It is demonstrated that the implemented DPP board works successfully in practical XRF systems.

• Proceedings of the KIEE Conference
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• 2003.04a
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• pp.163-165
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• 2003

Over the past several years, the application extent of the real-time systems is being expanded with the progress of civilization. An effort to minimize power consumption at the system is being accomplished in several fields from the design of an analog/digital circuit up to the device level Things of this effort have included the power optimum-technique to minimize power consumption at the digital logic circuit and the dynamic managed skill by means o( the decision of the operating system. In this paper, we designed of low power system by using Power-optimized method. As an effective low-power design, we designed the low power system which it has a monitoring system within the main board and a personal computer.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.6
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• pp.756-761
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• 2013

This paper propose the new demodulation method that can detect resolver signal's peak at the time of position estimation when the position information is required during current controller period. The proposed method is performed in a synchronous demodulation way with exciting signal and also cover a capability which can compensate the lag element of exciting signal caused by the resolver's inductive component and filter circuit. This paper carried out the experiment to investigate the validity and performance of the suggested method by using the test board made up of DSP and demodulation circuit. The test results show that the proposed method is theoretically clear and work completely as expected from making sure of sampling resolver signal's peak at the time of position estimation. In addition, Software position tracking algorithm is executed with the demodulated signals generated by the suggested method and an exact position can be estimated.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.4
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• pp.15-22
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• 2004

This paper presents the channel analysis considering power distribution network(PDN) system of PCB. For achieve the target PDN system we proposed the useful design approach for acquiring the characteristic target of power distribution network in overall frequency ranges. The proposed method is based on the hierarchical approach related to frequency ranges and the path-based equivalent circuit model to consider the interference of the current paths between the decoupling capacitors and the board through it is a lumped model for fast and easy calculation, experimental results show that the proposed model is almost as precise as the numerical analysis. The analysis of PDN system shows that although the effective inductance of package dominatly affects the power noise and the signal transfer through data channel, the board PDNs also can not be neglected for achieving the accurate channel signaling. Therefore, we must design concurrently the chip, package, and board from the initial spec design of high speed digital system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.23-32
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• 2006

Fast and accurate power bus design (FAPUD) method for multi-layers high-speed digital boards is devised for the power supply network design tool for accurate and precise high speed board. FAPUD is constructed, based on two main algorithms of the PBEC (Path Based Equivalent Circuit) model and the network synthesis method. The PBEC model exploits simple arithmetic expressions of the lumped 1-D circuit model from the electrical parameters of a 2-D power distribution network. The circuit level design based on PBEC is carried with the proposed regional approach. The circuit level design directly calculates and determines the size of on-chip decoupling capacitors, the size and the location of off-chip decoupling capacitors, and the effective inductances of the package power bus. As a design output, a lumped circuit model and a pre-layout of the power bus including a whole decoupling capacitors are obtained after processing FAPUD. In the tuning procedure, the board re-optimization considering simultaneous switching noise (SSN) added by I/O switching can be carried out because the I/O switching effect on a power supply noise can be estimated over the operation frequency range with the lumped circuit model. Furthermore, if a design changes or needs to be tuned, FAPUD can modify design by replacing decoupling capacitors without consuming other design resources. Finally, FAPUD is accurate compared with conventional PEEC-based design tools, and its design time is 10 times faster than that of conventional PEEC-based design tools.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.12
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• pp.55-67
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• 2010

The electrical properties of a back drilled via-hole (BDH) without the open-stub and the plated through via-hole (PTH) with the open-stub, which is called the conventional structure, in a high-count multi~layered (HCML) printed circuit board (PCB) were investigated for a high-speed digital system, and a selected inner layer to transmit a high-speed signal was farthest away from the side to mount the component. Within 10 GHz of the broadband frequency, a design of experiment (DOE) methodology was carried out with three cause factors of each via-hole structure, which were the distance between the via-holes, the dimensions of drilling pad and the anti-pad in the ground plane, and then the relation between cause and result factors which were the maximum return loss, the half-power frequency, and the minimum insertion loss was analyzed. Subsequently, the empirical formulae resulting in a macro model were extracted and compared with the experiment results. Even, out of the cause range, the calculated results obtained from the macro model can be also matched with the measured results within 5 % of the error.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2003.05a
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• pp.148-152
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• 2003

This paper is concerned with the digital implementation of the active vibration suppression controller. The digital controllers are often implemented on the DSP board, which is very fast but expensive. There are many low-cost micro-controllers in the market but the feasibility of such micro-controllers for the active vibration suppression has never been conducted. In this study, we selected PIC 16F877 as a proper micro-controller for the digital implementation of the PPF controller. The circuit diagrams are explained in detail. Experimental results show that the low-cost micro-controller can be used as the active vibration controller.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.12
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• pp.159-164
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• 2005

Recently, it has demanded high-speed digital circuits as information increase. Therefore, electromagnetic characteristics of compact microwave circuit occurred importantly. And, the effect of the imperfect ground plane on the signal integrity and influence of coupling between two parallel lines for high-speed digital transmission line on the printed circuit board is investigated by FDTD simulations in 3-D electromagnetic analysis method. The results of FDTD simulation are compared with the ADS simulation in commercial software, analyzed lumped element of modeling and electromagnetic wave's radiation of slot as frequency. As a consequence, when the slot in the ground plane is under microstrip line, it has much effect on propagation of wave.