• Journal of Advanced Navigation Technology
• /
• v.23 no.2
• /
• pp.172-178
• /
• 2019

This paper has designed, fabricated, and analyzed the passive devices realized using low temperature co-fired ceramic (LTCC) multi layer substrates by dividing into the shrinkage process and the non-shrinkage process. Using two types of ceramic materials with dielectric constant 7 or 40, we have fabricated the same shape of various elements in 2 different processes and compared the characteristics. For the substrate of dielctric constant 40, compared with the shrinkage process which has 17% shrink in the X and Y directions with 36% shrink in the Z direction, the non-shrinkage process has 43% shrink in the Z direction without shrink in the X and Y directions, so high dimensional accuracy and surface flatness can be obtained. The inductances and capacitances of the fabricated elements are estimated from measurement using empirical analysis equations of parameters and implemented as a design library. Depending on the substrate and the process, the inductance and capacitance depending on the turn number of winding and unit area have been measured, and empirical polynomials are proposed to predict element values.

• Korean Journal of Materials Research
• /
• v.5 no.6
• /
• pp.754-762
• /
• 1995

Strontium titanate(SrTiO$_3$) thin film was prepared on Si substrates by RF magnetron sputtering for a high capacitance density required for the next generation of LSTs. The optimum deposition conditions for SrTiO$_3$thin film were investigated by controlling the deposition parameters. The crystallinity of films and the interface reactions between SrTO$_3$film and Si substrate were characterized by XRD and AES respectively. High quality films were obtained by using the mixed gas of Ar and $O_2$for sputtering. The films were deposited at various bias voltages to obtain the optimum conditions for a high quality file. The best crystallinity was obtained at film thickness of 300nm with the sputtering gas of Ar+20% $O_2$and the bias voltage of 100V. The barrier layer of Pt(100nm)/Ti(50nm) was very effective in avoiding the formation of SiO$_2$layer at the interface between SrTiO$_3$film and Si substrate. The capacitor with Au/SrTiO$_3$/Pt/Ti/SiO$_2$/Si structure was prepared to measure the electric and the dielectric properties. The highest capacitance and the lowest leakage current density were obtained by annealing at $600^{\circ}C$ for 2hrs. The typical specific capacitance was 6.4fF/$\textrm{cm}^2$, the relative dielectric constant was 217, and the leakage current density was about 2.0$\times$10$^{-8}$ A/$\textrm{cm}^2$ at the SrTiO$_3$film with the thickness of 300nm.

• Journal of the Korean Ceramic Society
• /
• v.49 no.5
• /
• pp.475-483
• /
• 2012

High capacitance X5R MLCCs based on $BaTiO_3$ ceramic dielectric layers exhibit a single broad, asymmetric arc shape impedance and modulus response over the wide frequency range between 1 MHz to 0.01 Hz. Analysis according to the conventional brick-layer model for polycrystalline conductors employing a series connection of multiple RC parallel circuits leads to parameters associated with large errors and of little physical significance. A new parametric impedance model is shown to satisfactorily describe the experimental spectra, which is a parallel network of one resistor R representing the DC conductivity thermally activated by 1.32 eV, one ideal capacitor C exactly representing bulk capacitance, and a constant phase element (CPE) Q with complex capacitance $A(i{\omega})^{{\alpha}-1}$ with ${\alpha}$ close to 2/3 and A thermally activated by 0.45 eV or ca. 1/3 of activation energy of DC conductivity. The feature strongly indicate the CK1 model by J. R. Macdonald, where the CPE with 2/3 power-law exponent represents the polarization effects originating from mobile charge carriers. The CPE term is suggested to be directly related to the trapping of the electronic charge carriers and indirectly related to the ionic defects responsible for the insulation resistance degradation.

• Journal of the Korean Crystal Growth and Crystal Technology
• /
• v.23 no.1
• /
• pp.14-19
• /
• 2013

We have successfully synthesized $Bi_{4-x}La_xTi_3O_{12}$ (x~2) having Aurivillius-type layered perovskite structure from exfoliated layered perovskite oxide of $K_2La_2Ti_3O_{10}$ with Ruddlesden-Popper structure. The reaction between the exfoliated lanthanum titanate nanosheets and BiOCl nanocrystal resulted in the formation of polycrystalline $Bi_{4-x}La_xTi_3O_{12}$ (x~2) after heating above $700^{\circ}C$. Colloidal suspension of the nanosheets could be obtained by intercalating ethylamine (EA) into the protonated lanthanum titanate, $H_2La_2Ti_3O_{10}$, derived from $K_2La_2Ti_3O_{10}$. Transmission electron microscopic (TEM) analysis show that the exfoliated lanthanium titanate nanosheets have a thickness of a few nano meters. According to X-ray diffraction (XRD) analysis, the exfoliated lanthanium titanate was found to be transformed into $Bi_{4-x}La_xTi_3O_{12}$ (x~2) after restacking with BiOCl and subsequent thermal treatment at > $700^{\circ}C$.

• Journal of the Korean Vacuum Society
• /
• v.2 no.2
• /
• pp.246-254
• /
• 1993

In order to increase the capacitance of storage electrode in the DRAM capacitor, two approaches were performed. First, hemispherical and rugged poly silicon films were made by LPCVD to increase the effective surface area of storage electrode. The even surface morphology of conventional poly silicon electrode was changed into the uneven surface of hemispherical of rugged poly silicon films. Second, PECVD $Ta_2O_5$ dielectric films were deposited and thermally treated to study the dielectrical characteristics of $Ta_2O_5$ film on each electrode. MIS capacitors with $Ta_2O_5$ films were electrically characterized by I-V, C-V and TDDB measurements. As a result, the capacitance of the electrode with uneven surface were increased by a factor of 1.2~1.5 and leakage current was increased compared with those of even surface. TDDB result indicates that the electrode with uneven surface has dielectrically more degraded than that of even surface. These results can be helpful as a basic research to develop new generation DRAM capacitors with $Ta_2O_5$ films.

• Journal of the Korean Vacuum Society
• /
• v.9 no.3
• /
• pp.258-262
• /
• 2000

$YMnO_3$thin films are deposited on Si(100) and $Y_2O_3/Si(100)$ substrate by radio frequency sputtering. The deposition condition of oxygen partial pressure and annealing temperature have significant influences on the preferred orientation of $YMnO_3$film and the size of memory window. The results of x-ray diffraction show that the film deposited in the oxygen partial pressure of 0% is highly oriented along c-axis after annealing at $870^{\circ}C$ for 1 hr in oxygen ambient. However, the films deposited on Si and $Y_2O_3/Si$ in the oxygen partial pressures of 20% show $Y_2O_3$ peak, the excess $Y_2O_3$ in the $YMnO_3$film suppresses the c-axis oriented crystallization. Especially memory windows of the $Pt/YMnO_3/Y_2O_3/Si$ capacitor are 0.67~3.65 V at applied voltage of 2~12 V, which is 3 times higher than that of the film deposited on $Y_2O_3/Si$ in 20% oxygen (0.19~1.21 V) at the same gate voltage because the film deposited in 0% oxygen is well crystallized along c-axis.

• Journal of the Korean Institute of Telematics and Electronics D
• /
• v.36D no.1
• /
• pp.29-37
• /
• 1999

In this study, we have prepared PLT thin films having various La concentrations by using sol-gel method and studied on the effect of La concentration on the electrical properties of PLT thin films. As the La concentration increases from 5mol% to 28mol%, the dielectric constant at 10kHz increases from 428 to 761, while the loss tangent decreases from 0.063 to 0.024. Also, the leakage current density at 150kV/cm has a tendency to decrease from 6.96${\mu}A/cm^2$ to 0.79${\mu}A/cm^2$. In the result of hysteresis loops of PLT thin films, the remanent polariation and the coercive field decrease from 9.55${\mu}C/cm^2$ to 1.10${\mu}C/cm^2$ and from 46.4kV/cm to 13.7kV/cm, respectively. With the result of the fatigue test on the PLT thin films, we have found that the fatigue properties are improved remarkably as the La concentration increases from 5 mol% to 28mol%. In particular, the PLT28) has paraelectric phase and its charge storage clensity and leakage current density at 5V are 134fC/${\mu}cm^2$ and 1.01${\mu}A/cm^2$, respectively. The remanent polarization and coercive field of the PLT(10) film are 6.96${\mu}C/cm^2$ and 40.2kV/cm, respectively. After applying of $10^9$ square pulses with ${\pm}5V$, the remanent polarilzation of the PLT(10) film decreases about 20% from the initial state. In the results, we conclude that the 10mol% and the 28mol% La doped PLT thin films are very suitable for the capacitor dielectrics of new generation of DRAM and NVFRAM respecitively.