• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2006.10a
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• pp.31-32
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• 2006

• Korean Journal of Materials Research
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• v.11 no.1
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• pp.48-54
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• 2001

The effects of additives in the HCI etching solution on etching behaviors of aluminum foil as dielectric film for electrolytic capacitors were investigated. The etch pits formed in 1M hydrochloric acid containing ethylene glycol as an additive contain more fine and homogeneous etch tunnels compared to those in 1 M hydrochloric acid only, which led to the increase in the effective internal surface area of aluminum foil. After anodizing of aluminum foil etched in etching solutions, the LCR meter results have shown that the capacitance of dielectric film etched in hydrochloric acid with ethylene glycol was increased remarkably compared to that etched in hydrochloric acid only.

• Proceedings of the Materials Research Society of Korea Conference
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• 1996.05a
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• pp.77-77
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• 1996

• Journal of the Korean Society for Precision Engineering
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• v.19 no.5
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• pp.149-158
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• 2002

Recently, the minimum line width shows a tendency to decrease and the multi-level increases in semiconductor. Therefore, a planarization technique is needed and chemical mechanical polishing(CMP) is considered as one of the most suitable process. CMP accomplishes a high polishing performance and a global planarization of high quality. However there are several defects in CMF, such as micro-scratches, abrasive contaminations and non-uniformity of polished wafer edges. Wet etching process including spin-etching can eliminate the defects of CMP. It uses abrasive-free chemical solution instead of slurry. On this study, ILD(Interlayer-Dielectric) was removed by CMP and wet etching process using DHF(Diluted HF) in order to investigate the possibility of planrization by wet etching mechanism. In the thin film wafer, the results were evaluated from the viewpoint of material removal rate(MRR) and within wafer non-uniformity(WIWNU). And the pattern step heights were also compared for the purpose of planarity characterization of the patterned wafer. Moreover, Chemical polishing process which is the wet etching process with mechanical energy was introduced and evaluated for examining the characteristics of planarization.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.4
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• pp.286-291
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• 2003

(Pb,Sr)TiO$_3$(PST) thin films have attracted great interest as new dielectric materials of capacitors for Gbit dynamic random access memories. In this study, inductively coupled CF$_4$/Ar plasma was used to etch PST thin films. The maximum etch rate of PST thin films was 740 $\AA$/min at a CF$_4$(20 %)/Ar(80 %) 9as mixing ratio, an RF power of 800 W, a DC bias voltage of -200 V, a total gas flow of 20 sccm, and a chamber pressure of 15 mTorr. To clarify the etching mechanism, the residue on the surface of the etched PST thin films was investigated by X-ray photoelectron spectroscopy. It was found that Pb was mainly removed by physically assisted chemical etching. Sputter etching was effective in the etching of Sr than the chemical reaction of F with Sr, while Ti can almost removed by chemical reaction.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05b
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• pp.16-19
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• 2002

(Ba,Sr)TiO3(BST) thin film is an attractive material for the application in high-density dynamic random access memories (DRAMs) because of the high relative dielectric constant and small variation in dielectric properties with frequency. In this study, (Ba0.6,Sr0.4)TiO3 thin films on Pt/Ti/SiO2/Si substrates were deposited by a sol-gel method and the CF4/Ar inductively coupled plasma (ICP) etching behavior of BST thin films had been investigatedby varying the process parameters such as chamber pressure, ICP power, and substrate bias voltage. To analysis the composition of surface residue following etching BST films etched with different Ar/CF4 gas mixing ratio were investigated using x-ray photoelectron spectroscopy (XPS) and secondary ion mass spectrometer (SIMS).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.209-212
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• 2001

Polyimide(PI) films have been considered as the interlayer dielectric materials due to low dielectric constant, low water absorption, high gap-fill and planarization capability. The PI film was etched with using inductively coupled plasma (ICP). The etching characteristics such as etch rate and selectivity were evaluated to gas mixing ratio. High etch rate was 8300$\AA$/min and vertical profile was approximately acquired 90$^{\circ}$ at CF$_4$/(CF$_4$+O$_2$) of 0.2. The selectivies of polyimide to PR and SiO$_2$ were 1.2, 5.9, respectively. The etching profiles of PI films with an aluminum pattern were measured by a scanning electron microscope (SEM). The chemical states on the PI film surface were investigated by x-ray photoelectron spectroscopy (XPS). Radical densities of oxygen and fluorine in different gas mixing ratio of 07CF4 were investigated by optical emission spectrometer (OES).

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.263-263
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• 2011

본 연구에서는 DBD (Dielectric Barrier Discharge)방식의 상압 플라즈마를 이용하여 FPD (flat panel display) 공정에 사용되는 a-Si, Si3N4의 식각 공정 특성을 평가하였다. 사용된 DBD 반응기는 기존의 blank planar plate 형태의 Power가 인가되는 anode 부분과 Dielectric Barrier 사이 공간을 액상의 도전체로 채워 넣은 형태의 전극이 사용 하였으며, 인가 Power는 40kHz AC 최대인가 전압 15 kVp를 사용 하였다. 방전 가스는 N2, 반응가스로는 CDA (Clean Dry Air)와 NF3, 액상의 Etchant를 사용 하였으며 모든 공정은 In-line type으로 시편을 처리 하였다. NF3의 경우 30 mm/sec 이송속도 1회 처리 기준 a-Si 1300${\AA}$, Si3N4 1900${\AA}$의 식각 두께를 보였으며 a-Si : Si3N4 선택비는 N2, CDA의 조절을 통하여 최대 1:2에서 4:1 정도까지 변화가 가능하였다. 균일도는 G2 (370 mm${\times}$470 mm)의 경우 5.8 %의 균일도를 보이고 있다. 이외에도 NF3 공정의 경우 실제 TFT-LCD 공정 중 n+ channel (n+ a-Si:H)식각 공정에 적용하여 5.5 inch LCD panel feasibility를 확인 할 수 있었다. 액상 Etchant (HF수용액, NH4HF2)는 버블러를 사용하여 기화 시켜 플라즈마 소스를 통해 1차적으로 활성화 시키고 기존 DBD 반응기에 공급해 주는 형태로 평가를 진행하였다. 식각 특성은 30mm/sec 이송속도에서 a-Si $25{\AA}$ 정도로 가스 형태의 Etchant에 비해 매우 낮은 수준이나 Etching rate 향상을 위한 factor 파악 및 개선을 위한 연구를 진행 하였다.

• Proceedings of the KIEE Conference
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• 2000.11c
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• pp.519-521
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• 2000

The application of low dieletric constant material instead of $SiO_2$ has been considered to reduce interconnection delay, crosstalk, power exhaustion. Methylsilsesquioxane (MSSQ) have a dieletric constant less than k>3 which is lower than that for the convention $SiO_2$ insulator ($k{\sim}4$). The Propose of this study is to know etching rate of MSSQ. Expermentation in this paper use RIE(Reactive ion Etching) and centre) flow rate of $CF_4/O_2$ gas, RF power.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.06a
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• pp.411-414
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• 1998

In this paper, the silicon-nitride membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PT layer as a IR detection layer was deposited on the membrane and its characteristics were measured. The attack of PT layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer can be solved through the method of bonding/etching of silicon wafer. Because the PT layer of c-axial orientation rained thermal polarization without polling, the more integration capability can be achieved. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by IR detector, and the bonding interface was observed by SEM. The polarization characteristics and the dielectric characteristics of the PT layer were measured, too.