• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.6
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• pp.343-349
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• 2014

It is summarized that potential causes of performance degradations and failure mechanisms of crystalline silicon photovoltaic (PV) modules installed in Middle East area. In addition, we also reviewed current PV module qualification test (IEC 61215) and the methods for detection of wear-out fault. The failure of PV modules in the extreme environmental conditions such as deserts is mainly due to high temperature, humidity, and dust storms. In particular, cementation phenomenon caused by combination of sand and moisture leads to rapid degradation in the performance of PV modules. In order to evaluate and guarantee the long term reliability of PV modules, specific qualification tests such as sand dust test, salt mist test and potential induce degradation test considering operating environment of PV module should be carried out.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.3 s.345
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• pp.9-14
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• 2006

The dependence of NBTI lifetime on the BEOL processes such as sintering gas type and passivation layer has been characterized in depth. Then, optimized BEOL process scheme is proposed to improve NBTI lifetime. NBTI showed degradation due to the plasma enhanced nitride (PE-SiN) passivation film and $H_2$ sintering anneal. Then, new process scheme of $N_2$ annealing instead of $H_2$ annealing prior to PE-SiN deposition is proposed. The proposed BEOL process flow showed that NBTI lifetime can be improved a lot without degradation of device performance and NMOS hot carrier reliability.

• Transactions on Electrical and Electronic Materials
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• v.12 no.3
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• pp.93-97
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• 2011

In this paper, we discuss design considerations for an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) with a lateral asymmetric channel (LAC) doping profile. We employed a 0.35 ${\mu}M$ standard complementary MOSFET process for fabrication of the devices. The gates to the LAC doping overlap lengths were 0.5, 1.0, and 1.5 ${\mu}M$. The drain current ($I_{ON}$), transconductance ($g_m$), substrate current ($I_{SUB}$), drain to source leakage current ($I_{OFF}$), and channel-hot-electron (CHE) reliability characteristics were taken into account for optimum device design. The LAC devices with shorter overlap lengths demonstrated improved $I_{ON}$ and $g_m$ characteristics. On the other hand, the LAC devices with longer overlap lengths demonstrated improved CHE degradation and $I_{OFF}$ characteristics.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.331-331
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• 2012

With the NAND Flash scaling down, it becomes more and more difficult to follow Moore's law to continue the scaling due to physical limitations. Recently, three-dimensional (3D) flash memories have introduced as an ideal solution for ultra-high-density data storage. In 3D flash memory, as the process reason, we need to use poly-Si TFTs instead of conventional transistors. So, after combining charge trap flash (CTF) structure and poly-Si TFTs, the emerging device SONOS-TFTs has also suffered from some reliability problem such as hot carrier degradation, charge-trapping-induced parasitic capacitance and resistance which both create interface traps. Charge pumping method is a useful tool to investigate the degradation phenomenon related to interface trap creation. However, the curves for charge pumping current in SONOS TFTs were far from ideal, which previously due to the fabrication process or some unknown traps. It needs an optimization and the important geometrical effect should be eliminated. In spite of its importance, it is still not deeply studied. In our work, base-level sweep model was applied in SONOS TFTs, and the nonideal charge pumping current was optimized by adjusting the gate pulse transition time. As a result, after the optimizing, an improved charge pumping current curve is obtained.

• International Journal of Ocean System Engineering
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• v.1 no.3
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• pp.148-154
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• 2011

Generally, strength degradation is caused by the absorption of moisture in composites. For this reason, a fracture is generated in the composites and traces of glass fiber degrade human health and physical damage is generated. Therefore, in this research, we studied the mechanical properties change of composites by moistureabsorption. The composites were manufactured with and without the Gel-coating process and were immersed in a moisture absorption device at $80^{\circ}C$ for more than 100 days. The mechanical properties of the moistureabsorption composites and the composites which dry after moisture-absorption were compared. The mechanical properties degradation of basalt fiber composites according to the result of the measurement of moistureabsorption was smaller than that of glass fiber composites by about 20%. In addition, the coefficient of moisture absorption was lower for the case of Gel-coating processing than the composites without the Gel-coating process by about 2% and it was deduced that Gel-coating did not have a significant effect on the mechanical properties.

• Proceedings of the KIEE Conference
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• 2003.07c
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• pp.1626-1628
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• 2003

The lightning arrester is a very important overvoltage protection device in the electric power system. Therefore, the inspection of lightning arrester whether it keeps its performance or not properly has close related to verifying the safety confidence of the electric power system. But the development of the deterioration measuring method and on-line detecting system, is necessary to monitor the deterioration of the lightening arrestor. In this paper, we developed the lightning arrester degradation monitoring system. This system detected leakage current of lightning arrester by using the ZCT, and analyze the third harmonics ingredient of leakage current using DFT method in the Data Acquisition Unit(DAU). The analyzed current signal is transmit to the Human-Machine Interface(HMI), and HMI alarmed when accident are occurred and informed with the amplitude of leakage current to the operator.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.13-16
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• 2004

The reliability of 1.550m-wavelength InGaAs mesa waveguide photodiodes(WGPDs), which developed for 40-Gbps optical receiver applications, fabricated by metal organic chemical vapor deposition is investigated. Reliability is examined by both high-temperature storage tests and the accelerated life tests by monitoring dark current and breakdown voltage. The median device lifetime and the activation energy of the degradation mechanism are computed for WGPD test structures. From the accelerated life test results, the activation energy of the degradation mechanism and median lifetime of these devices in room temperature are extracted from the log-normal failure model by using average lifetime and the standard deviation of that lifetime in each test temperature. It is found that the WGPD structure yields devices with the median lifetime of much longer than $10^6$ h at practical use conditions. Consequently, this WGPD structure has sufficient characteristics for practical 40-Gbps optical receiver modules.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.2
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• pp.45-50
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• 2010

An image interpolation is a technique to use for enhancement of image resolution, it have two problems which are image quality degradation of the interpolated result image and high computation complexity. In this paper, to solve the problem, we propose an image interpolation algorithm using loss information estimation and implement the proposed method on portable device. From reduction image of obtained low resolution image, the proposed method can computes error to use image interpolated and estimate loss information by interpolation of the computed error. The estimated loss information is added to interpolated high resolution image with weight factor. We verified that the proposed method has improved FSNR as 2dB than conventional algorithms by experiments. Also, we implemented the proposed method on portable device and checked up real-time action. The proposed algorithm may be helpful for various application for image enlargement and reconstruction.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.1
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• pp.24-28
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• 2012

In this study, we fabricated an amorphous InGaZnO pseudo-MOS transistor (a-IGZO ${\Psi}$-MOSFET) with a stacked $Si_3N_4/SiO_2$ (NO) gate dielectric and evaluated reliability of the devices with various thicknesses of a $SiO_2$ buffer layer. The roles of a $SiO_2$ buffer layer are improving the interface states and preventing degradation caused by the injection of photo-created holes because of a small valance band offset of amorphous IGZO and $Si_3N_4$. Meanwhile, excellent electrical properties were obtained for a device with 10-nm-thick $SiO_2$ buffer layer of a NO stacked dielectric. The threshold voltage shift of a device, however, was drastically increased because of its thin $SiO_2$ buffer layer which highlighted bias and light-induced hole trapping into the $Si_3N_4$ layer. As a results, the pseudo-MOS transistor with a 20-nm-thick $SiO_2$ buffer layer exhibited improved electrical characteristics and device reliability; field effective mobility(${\mu}_{FE}$) of 12.3 $cm^2/V{\cdot}s$, subthreshold slope (SS) of 148 mV/dec, trap density ($N_t$) of $4.52{\times}1011\;cm^{-2}$, negative bias illumination stress (NBIS) ${\Delta}V_{th}$ of 1.23 V, and negative bias temperature illumination stress (NBTIS) ${\Delta}V_{th}$ of 2.06 V.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.3
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• pp.63-69
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• 2019

Soldering technology has been used in electronic industry for a long time. However, due to solder fatigue characteristics, automotive electronics are searching the semi-permanent interconnection technology such as press-fit method. Press fit interconnection is a joining technology that mechanically inserts a press fit metal terminal into a through hole in a board, and induces a strong bonding by closely contacting the inner surface joining of the through hole by plastic deformation of press-fit terminal. In this paper, the bonding properties of press-fit interconnection are investigated with PCB hole size and surface finishes. In order to compare interconnection reliability between the press fit and soldering, the change in resistance of the press-fit and soldering joints was observed during thermal shock test. After thermal cycling, the failure modes are investigated to reveal the degradation mechanism both press-fit and soldering technology.