• Journal of KIISE:Software and Applications
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• v.29 no.12
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• pp.883-894
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• 2002

Classical deterministic testing controls the execution of concurrent programs based on the equivalence between specifications and programs. However, it is not directly applicable to a situation in which synchronization sequences, being valid but infeasible, are taken into account. To resolve this problem, we had proposed automata-based deterministic testing in our previous works, where a concurrent program is executed according to one of the sequences accepted by the automaton recognizing all sequences semantically equivalent to a given sequence. In this paper, we present the automata-based testing environment for Java multi-thread programs, and we design and implement "Deterministic Executor" in the testing environment. "Deterministic Executor" transforms a Java multi-thread program by applying automata-based deterministic testing, the transformed program presents testing results. "Deterministic Executor" uses "Automata Generator", which generates an equivalent automaton of a test sequence, and "Replay Controller", which controls the execution of programs according to the sequence accepted by the automaton. By illustrating automata-based testing procedures with a gas station example, we show how the proposed approach does works in a Java multi-threaded program.roach does works in a Java multi-threaded program.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.12
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• pp.83-90
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• 2004

This paper proposes an efficient scan testing method for compression of test input data and reduction of test power for SOC. The proposed method determines whether some parts of a test response can be reused as a part of next input test data on the analysis of deterministic test data and its response. Our experimental results show that benchmark circuits have a high similarity between un-compacted deterministic input test data and its response. The proposed testing method achieves the average of 29.4% reduction of power dissipation based on the number of test clock and 69.7% reduction of test data for ISCAS'89 benchmark circuits.

• Journal of KIISE:Software and Applications
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• v.28 no.10
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• pp.706-719
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• 2001

In this paper, we present a new approach to deterministic execution for testing concurrent programs. The proposed approach makes use of the notion of event independence which has been used in the partial-order method in order to resolve the state-explosion problem and constructs and automation which accepts all the sequences semantically equivalent to a given sequence. Consequently, we can allow a program to be executed according to event sequences other then the (possibly infeasible) given sequence if they have the same effects on the program's behavior. One advantage of this method is that it can be applied to situations where a program is not exactly implemented as described in the specification.

• Proceedings of the Korea Concrete Institute Conference
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• 2003.05a
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• pp.181-186
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• 2003

There are many uncertainties in structural failures or structures, so probabilistic failure cause assessment should be performed in order to consider the uncertainties. However, in many cases of forensic engineering, the failure cause assessments are performed by deterministic approach though number of uncertainties are existed in the failures or structures. Thus, deterministic approach may have possibility for leading to unreasonable and unrealistic failure cause assessment due to ignorance of the uncertainties. Therefore, probabilistic approach is needed to complement the shortcoming of deterministic approach and to perform the more reasonable and realistic failure cause assessment. In this study, reliability-based failure cause assessment (reliability based forensic engineering) is performed, which can incorporate uncertainties in failures and structures. For more practical application, the modified ETA technique is proposed, which automatically generates the defected structural model, performs structural analysis and reliability analysis, and calculates the failure probabilities of the failure events and the occurrence probabilities of the failure scenarios. Also, for more precise reliability analysis, uncertainties are estimated more reasonably by using bayesian approach based on the experimental laboratory testing data in forensic report.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.3
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• pp.397-403
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• 2015

This paper presents a new SOC test compression scheme in Embedded Deterministic Test (EDT) compression environment. Compressed test data is brought over the TAM from the tester to the cores in SOC and decompressed in the cores. The proposed scheme allows cores tested at the same time to share some test channels. By sharing free variables in these channels across test cubes of different cores decompressed at the same time, high encoding efficiency is achieved. Moreover, no excess control data is required in this scheme. The ability to reuse excess free variables eliminates the need for high precision in matching the number of test channels with the number of care bits for every core. Experimental results obtained for some SOC designs illustrate effectiveness of the proposed test application scheme.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.10
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• pp.1572-1581
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• 1993

DFSM(Deterministic Finite State Machine) is used because it easily represents the control flow of a protocol in the protocol specification. Real protocols contain problem of nondeterminisms that have more than one enabled transition in the same state by same input. But DFSM does not process nondeterminism. So, in this paper, we first specify a protocol with NFSM (Nonderministic FSM) that may show the characteristics of nondeterminism, and propose an algorithm which converts NFSM to DFSM.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.2
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• pp.280-290
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• 1997

The Single TTCN has been broadly used to describe the ATS(Abstract Test Suite) for the protocol confronance testing. But if the single TTCN is used to test the multi-party protocol with the non-deterministic factors, then huge amount of test notations are needed and also it is hard to understand the ATS. Therefore, the concurrent TTCN was proposed to solve these problems and the study in progress. In this paper, we did investigate and compare the characteristics of esisting single TTCN with those of the concurrent TTCN. In order to develop the ATS of the Q.2971 which is B-ISDN call/connection control protocol, the testing model was defined and the concurrent factors were extracted according to that model. As a result, we could verify the usefulness of the confcurrent TTCN.

• Nuclear Engineering and Technology
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• v.52 no.3
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• pp.499-507
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• 2020

Research reactors for radioisotope production, fuel and material testing and research activities are designed, constructed and operated based on the society's needs. In this study, neutronic and thermal hydraulic design of a high neutron flux research reactor core for radioisotope production is presented. Main parameters including core excess reactivity, reactivity variations, power and flux distribution during the cycle, axial and radial power peaking factors (PPF), Pu₂₃₉ production and minimum DNBR are calculated by nuclear deterministic codes. Core calculations performed by deterministic codes are validated with Monte Carlo code. Comparison of the neutronic parameters obtained from deterministic and Monte Carlo codes indicates good agreement. Finally, subchannel analysis performed for the hot channel to evaluate the maximum fuel and clad temperatures. The results show that the average thermal neutron flux at the beginning of cycle (BOC) is 1.0811 × 10¹⁴ n/㎠-s and at the end of cycle (EOC) is 1.229 × 10¹⁴ n/㎠-s. Total Plutonium (Pu₂₃₉) production at the EOC evaluated to be 0.9487 Kg with 83.64% grade when LEU (UO₂ with 3.7% enrichment) used as fuel. This designed reactor which uses LEU fuel and has high neutron flux and low plutonium production could be used for peaceful nuclear activities based on nuclear non-proliferation treaty concepts.

• ETRI Journal
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• v.32 no.1
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• pp.73-83
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• 2010

Combinatorial testing has been an active research area in recent years. One challenge in this area is dealing with the combinatorial explosion problem, which typically requires a very expensive computational process to find a good test set that covers all the combinations for a given interaction strength (t). Parallelization can be an effective approach to manage this computational cost, that is, by taking advantage of the recent advancement of multicore architectures. In line with such alluring prospects, this paper presents a new deterministic strategy, called multicore modified input parameter order (MC-MIPOG) based on an earlier strategy, input parameter order generalized (IPOG). Unlike its predecessor strategy, MC-MIPOG adopts a novel approach by removing control and data dependency to permit the harnessing of multicore systems. Experiments are undertaken to demonstrate speedup gain and to compare the proposed strategy with other strategies, including IPOG. The overall results demonstrate that MC-MIPOG outperforms most existing strategies (IPOG, IPOF, IPOF2, IPOG-D, ITCH, TConfig, Jenny, and TVG) in terms of test size within acceptable execution time. Unlike most strategies, MC-MIPOG is also capable of supporting high interaction strengths of t > 6.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1065-1068
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• 1998

This paper proposes a new test generation method. Most of the test generation methods are gate-level based, but our scheme is VHDL based, especially in other word, behavioral-level based. Our test pattern generation method uses software test method. And we generate deterministic test pattern with this method. The purpose of our method is to reduce the time and effort to generate the test patterns for the end-product test of IC.