• Proceedings of the IEEK Conference
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• 2002.06e
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• pp.243-246
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• 2002

This paper presents a study on the design and implementation of modulized I/O buffer control system for large capacity cable check. A 8bit I/O buffer basic module which has feedback loops with input and output buffers is simulated in PSpice and implemented with logic gates. This system is composed of 18 sub-boards which have 3 channels of 32bit data buses, and of a main board with MPC860 microprocessor.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.2
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• pp.239-249
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• 1993

In this paper, we present a design and implementation of Hangul C Programming language corresponding to Turbo C. The instruction of Hangul C were selected to be easily understood by elementary middle, high school students, and DOS commands and error message were translated into the Hangul.

• Proceedings of the IEEK Conference
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• 2003.11c
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• pp.51-54
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• 2003

This paper describes the design and implementation of HNCP bundle in the OSGi framework targeted to the home network system. The developed home network system is composed of a home server and several networked home appliances, and is connected via residential gateway to the external access network. The developed HNCP bundle allows a user to control and monitor home appliances in HNCP domain. We show the feasibility of the implemented HNCP bundle in the OSGi framework.

• Smart Structures and Systems
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• v.13 no.2
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• pp.235-255
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• 2014

This paper mainly introduces recently developed technologies pertaining to the design and implementation of Active Mass Damper (AMD) control system on a high-rise building subjected to wind load. Discussions include introduction of real structure and the control system, the establishment of analytical model, the design and optimization of a variety of controllers, the design of time-varying variable gain feedback control strategy for limiting auxiliary mass stroke, and the design and optimization of AMD control devices. The results presented in this paper demonstrate that the proposed AMD control systems can resolve the issues pertaining to insufficient floor stiffness of the building. The control system operates well and has a good sensitivity.

• The Transactions of the Korea Information Processing Society
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• v.6 no.7
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• pp.1941-1954
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• 1999

This paper presents a design and implementation of CRs(CHILL Run-time support System) to adapt the concurrent processing facilities of CHILL(CCITT High Level Language) which had recommended by ITU-T(International Telecommunication Union Telecommunication Standardization Sector). Because the CHILL provides more various concurrent processing facilities that other concurrent programming language, a design and implementation on CRS can give us real effects to gain the major functionalities and the techniques of the concurrent processing. In this paper, we design the interface rules of concurrent functions to conform with the CHILL compiler. We use the concurrent processing primitives as the library style to be invoked by procedure calls, and implement the start-up routine of the CHILL program, the context switching routine, and the CHILL process control parts to control be execution of the CHILL processes concurrently.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.417-420
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• 2000

In this paper, the design and the implementation of a realtime monitoring system using WWW protocol over the Internet is described. The overall system architecture and the functional structure of the system are presented. A Java applet is used in the development of the system for the motion picture effect of JPEG still images. The system is tested on a LAN and the experimental results are described.

• Proceedings of the KIPE Conference
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• 2004.07a
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• pp.350-354
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• 2004

This paper presents theoretical and practical details about the design, implementation, and performance of a series resonant do-to-dc converter using planar magnetics. Result of sinusoidal analysis are used to predict the voltage gain and conversion efficiency. The performance of a prototype converter is presented including the efficiency measurement and theoretical loss breakdown.

• 제어로봇시스템학회:학술대회논문집
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• 2001.10a
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• pp.131.1-131
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• 2001

At the present time, multimedia chip, internet application, and network equipment is designed by using ARM core. Because it has a good debugging, software compiler and needed low power. We must process a data coding to send a multimedia data by real time. So need to connect software and hardware algorithm. In this research, We design interface for ARM9/AMBA based board using VHDL for these function implementation. The board is used the ARM company´s ARM940T for software function implementation and Xilinx company´s Virtex E2000 for hardware function algorithm. The various hardware algorithm (ME,ME,DCT) block for performance can be implemented on this system.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.442-445
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• 2003

We investigate the middleware technology which will take a major role of extending the usage of home networking. UPnP and Jini belong to the most important technologies among them. In this paper, we suggest the interoperability between UPnP and Jini. We describe the design and implementation of UPmp-to-Jini service which makes it possible for a Jini client to utilize a UPnP device.

• ETRI Journal
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• v.11 no.4
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• pp.22-36
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• 1989

In this paper, a design and implementation of an efficient protocol verification system named LOVE has been described. The LOVE has been developed specifically for LOTOS. It performs not only protocol syntax validation (PSV) but also protocol functional verification(PFV). The PSV is a test to check if a protocol is free from protocol syntax errors such as deadlocks and livelocks. The PFV confirms whether or not a protocol achieves its functional objectives. For the PSV, the reachability analysis is employed, and the observational equivalence test is used for the PFV. For protocol verification using the LOVE, a schematic protocol verification methodology has been outlined.