• Title/Summary/Keyword: Delta sigma

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Development and Characterization of Trans Free Margarine Stock from Lipase-Catalyzed Interesterification of Avocado and Palm Oils (팜유와 아보카도유로부터 효소적 interesterification을 통한 trans free margarine stock 제조 및 이화학적 특성 연구)

  • Lee, Yun-Jeung;Lee, Ki-Teak
    • Korean Journal of Food Science and Technology
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    • v.41 no.3
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    • pp.231-237
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    • 2009
  • Trans free margarine stock (TFMS) was produced by lipase-catalyzed synthesis of fully hydrogenated soybean oil (FHSBO), avocado oil (AO) and palm oil (PO). A blend of FHSBO, AO, and PO with a 1:5:4 (30:150:120 g, respectively) ratio was interesterified with lipozyme RM IM(from Rhizomucor miehei) in a 1 L-batch type reactor at 65 for 12 hr, and the physicochemical and melting properties of TFMS were compared with commercial margarine. The solid fat content (%) of the TFMS was analyzed at 25, 30, and $35^{\circ}C$, respectively, while its melting point was $37.8^{\circ}C$. The trans fatty acid content of the TFMS was below 0.1%. It also had acid, saponification, and iodine values of 0.4, 173.9, and 58.6, respectively. In HPLC chromatograms of the TFMS, newly synthesized peaks of triacylglycerol molecules were observed by using reverse-phase HPLC with evaporative light-scattering detection. Normal-phase HPLC with UV detection was used to quantify tocopherols in the TFMS, indicating that its ${\alpha}-$, ${\gamma}-$ and ${\delta}$-tocopherol contents were 5.7, 2.1, and 1.7 mg/100 g, respectively.

Full-Custom Design of a Serial Peripheral Interface Circuit for CMOS RFIC Testing (CMOS RF 집적회로 검증을 위한 직렬 주변 인터페이스 회로의 풀커스텀 설계)

  • Uhm, Jun-Whon;Lee, Un-Bong;Shin, Jae-Wook;Shin, Hyun-Chol
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.9
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    • pp.68-73
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    • 2009
  • This paper presents an easily modifiable structure of a serial peripheral interface (SPI) that is suitable for efficient testing of CMOS RF integrated circuits. The proposed SPI Is designed so that the address size and the accompanying software can be easily adjusted and modified according to the requirements and complexity of RF IC's under development. The hardware architecture and software algorithm to achieve the flexibility are described. The proposed SPI is fabricated in $0.13{\mu}m$ CMOS and successfully verified experimentally with a 2.7GHz fractional-N delta-sigma frequency synthesizer as a device under test.

A $2{\sim}6GHz$ Wide-band CMOS Frequency Synthesizer With Single LC-tank VCO (싱글 LC-탱크 전압제어발진기를 갖는 $2{\sim}6GHz$의 광대역 CMOS 주파수 합성기)

  • Jeong, Chan-Young;Yoo, Chang-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.9
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    • pp.74-80
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    • 2009
  • This paper describes a $2{\sim}6GHz$ CMOS frequency synthesizer that employs only one LC-tank voltage controlled oscillator (VCO). For wide-band operation, optimized LO signal generator is used. The LC-tank VCO oscillating in $6{\sim}8GHz$ provides the required LO frequency by dividing and mixing the VCO output clocks appropriately. The frequency synthesizer is based on a fractional-N phase locked loop (PLL) employing third-order 1-1-1 MASH type sigma-delta modulator. Implemented in a $0.18{\mu}m$ CMOS technology, the frequency synthesizer occupies the area of $0.92mm^2$ with of-chip loop filter and consumes 36mW from a 1.8V supply. The PLL is completed in less than $8{\mu}s$. The phase noise is -110dBC/Hz at 1MHz offset from the carrier.

CLUSTERING OF EXTREMELY RED OBJECTS IN THE SUBARU GTO 2DEG2 FIELD

  • Shin, Jihey;Shim, Hyunjin;Hwang, Ho Seong;Ko, Jongwan;Lee, Jong Chul;Utsumi, Yousuke;Hwang, Narae;Park, Byeong-Gon
    • Journal of The Korean Astronomical Society
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    • v.50 no.3
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    • pp.61-70
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    • 2017
  • We study the angular correlation function of bright ($K_s{\leq}19.5$) Extremely Red Objects (EROs) selected in the Subaru GTO 2$deg^2$ field. By applying the color selection criteria of $R-K_s$ > 5.0, 5.5, and 6.0, we identify 9055, 4270, and 1777 EROs, respectively. The number density is consistent with similar studies on the optical - NIR color selected red galaxies. The angular correlation functions are derived for EROs with different limiting magnitude and different $R-K_s$ color cut. When we assume that the angular correlation function $w({\theta})$ follows a form of a power-law (i.e., $w({\theta})=A{\theta}^{-{\delta}}$), the value of the amplitude A was larger for brighter EROs compared to the fainter EROs. The result suggests that the brighter, thus more massive high-redshift galaxies, are clustered more strongly compared to the less massive galaxies. Assuming that EROs have redshift distribution centered at ~ 1.1 with ${\sigma}_z=0.15$, the spatial correlation length $r_0$ of the EROs estimated from the observed angular correlation function ranges ${\sim}6-10h^{-1}Mpc$. A comparison with the clustering of dark matter halos in numerical simulation suggests that the EROs are located in most massive dark matter halos and could be progenitors of $L_{\ast}$ elliptical galaxies.

Envelope Elimination and Restoration Transmitter for Efficiency and Linearity Improvement of Power Amplifier (전력증폭기의 효율 및 선형성 개선을 위한 포락선 제거 및 복원 송신기)

  • Cho, Young-Kyun;Kim, Changwan;Park, Bong Hyuk
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.3
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    • pp.292-299
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    • 2015
  • An envelope elimination and restoration transmitter that uses a tri-level envelope encoding scheme is presented for improving the efficiency and linearity of the system. The proposed structure amplifies the same magnitude signal regardless of the input peak-to-average power ratio and reduces the quantization noise by spreading out the noise to the out-of-band frequency, resulting in the enhancement of power efficiency. An improved linearity is also obtained by providing a new timing mismatch calibration technique between the envelope and phase signal. Implementation in a 130 nm CMOS process, transmitter measurements on a 20-MHz long-term evolution input signal show an error vector magnitude of 3.7 % and an adjacent channel leakage ratio of 37.5 dBc at 2.13 GHz carrier frequency.

A 900 MHz Zero-IF RF Transceiver for IEEE 802.15.4g SUN OFDM Systems

  • Kim, Changwan;Lee, Seungsik;Choi, Sangsung
    • ETRI Journal
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    • v.36 no.3
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    • pp.352-360
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    • 2014
  • This paper presents a 900 MHz zero-IF RF transceiver for IEEE 802.15.4g Smart Utility Networks OFDM systems. The proposed RF transceiver comprises an RF front end, a Tx baseband analog circuit, an Rx baseband analog circuit, and a ${\Delta}{\Sigma}$ fractional-N frequency synthesizer. In the RF front end, re-use of a matching network reduces the chip size of the RF transceiver. Since a T/Rx switch is implemented only at the input of the low noise amplifier, the driver amplifier can deliver its output power to an antenna without any signal loss; thus, leading to a low dc power consumption. The proposed current-driven passive mixer in Rx and voltage-mode passive mixer in Tx can mitigate the IQ crosstalk problem, while maintaining 50% duty-cycle in local oscillator clocks. The overall Rx-baseband circuits can provide a voltage gain of 70 dB with a 1 dB gain control step. The proposed RF transceiver is implemented in a $0.18{\mu}$ CMOS technology and consumes 37 mA in Tx mode and 38 mA in Rx mode from a 1.8 V supply voltage. The fabricated chip shows a Tx average power of -2 dBm, a sensitivity level of -103 dBm at 100 Kbps with PER < 1%, an Rx input $P_{1dB}$ of -11 dBm, and an Rx input IP3 of -2.3 dBm.

Design of a CMOS Frequency Synthesizer for FRS Band (UHF FRS 대역 CMOS PLL 주파수 합성기 설계)

  • Lee, Jeung-Jin;Kim, Young-Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.12
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    • pp.941-947
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    • 2017
  • This paper reports a fractional-N phase-locked-loop(PLL) frequency synthesizer that is implemented in a $0.35-{\mu}m$ standard CMOS process and generates a quadrature signal for an FRS terminal. The synthesizer consists of a voltage-controlled oscillator(VCO), a charge pump(CP), loop filter(LF), a phase frequency detector(PFD), and a frequency divider. The VCO has been designed with an LC resonant circuit to provide better phase noise and power characteristics, and the CP is designed to be able to adjust the pumping current according to the PFD output. The frequency divider has been designed by a 16-divider pre-scaler and fractional-N divider based on the third delta-sigma modulator($3^{rd}$ DSM). The LF is a third-order RC filter. The measured results show that the proposed device has a dynamic frequency range of 460~510 MHz and -3.86 dBm radio-frequency output power. The phase noise of the output signal is -94.8 dBc/Hz, and the lock-in time is $300{\mu}s$.

Electrical Resistivity Imaging for Upper Layer of Shield TBM Tunnel Ceiling (쉴드 TBM터널 상부 지반 연약대 전기탐사)

  • Jung, Hyun-Key;Park, Chul-Hwan
    • Proceedings of the Korean Geotechical Society Conference
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    • 2005.03a
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    • pp.401-408
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    • 2005
  • Recently shield TBM tunnellings are being applied to subway construction in Korean cities. Generally these kinds of tunnellings have the problems in the stability of ground such as subsidence because urban subway is constructed in the shallow depth. A sinkhole occurred on the road just above the tunnel during tunneling in Kwangju, so a survey for upper layer of the tunnel was needed. But conventional Ground Probing Radar can't be applicable due to the presence of steel-mesh screen in the shield segment, so no existent geophysical method is applicable in this site. Because the outer surface of each shield segment is electrically insulated, dipole-dipole resistivity method which is popular in engineering site investigation, was tried to this survey for the first time. Specially manufactured flexible ring-type electrodes were installed into the grouting holes at an interval of 2.4 m on the ceiling. The K-Ohm II system which has been developed by KIGAM and tested successfully in many sites, was used in this site. The system consists of 1000Volt-1Ampere constant-current transmitter, optically isolated 24 bit sigma-delta A/D conversion receiver - maximum 12 channel simultaneous measurements, and graphical automatic acquisition software for easy data quality check in real time. Borehole camera logging with circular white LED lighting was also done to investigate the state of the layer. Measured resistivity data lack of some stations due to failing opening lids of holes, shows general high-low trend well. The dipole-dipole resistivity inversion results discriminate (1) one approximately 4 meter diameter cavity (grouted but incompletely hardened, so low resistivity - less than $30{\Omega}m$), (2) weak zone (100-200${\Omega}m$), and (3) hard zone (high resistivity - more than 1000${\Omega}m$) very well for the distance of 320 meters. The 2-D inversion neglects slight absolute 3-D effect, but we can get satisfactory and useful information. Acquired resistivity section and video tapes by borehole camera logging will be reserved and reused if some problem occurs in this site in the future.

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A Low Jitter Dual Output Frequency Synthesizer Using Phase-Locked Loop for Smart Audio Devices (위상고정루프를 이용한 낮은 지터 성능을 갖는 스마트 오디오 디바이스용 이중 출력 주파수 합성기 설계)

  • Baek, Ye-Seul;Lee, Jeong-Yun;Ryu, Hyuk;Lee, Jongyeon;Baek, Donghyun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.2
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    • pp.27-35
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    • 2016
  • A Low jitter dual output frequency synthesizer for smart audio devices is described in this paper. It has been fabricated in a 1.8 V Dongbu $0.18-{\mu}m$ CMOS process. Output frequency is controlled by 3 rd order Sigma-Delta Modulation and digital divider. The frequency synthesizer has a size of $0.6mm^2$, frequency range of 0.6-200 MHz, loop bandwidth of 350 kHz, and rms jitter of 11.4 ps-21.6 ps.

Fatigue Design of Spot Welded Lap Joint Considered Residual Stress (잔류응력을 고려한 점용접이음재의 피로설계)

  • Son, Il-Seon;Bae, Dong-Ho;Hong, Jeong-Gyun;Lee, Beom-No
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.24 no.3 s.174
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    • pp.743-751
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    • 2000
  • Because welding residual stress is formidable result in electric resistance spot welding process, and it detrimentally affect to fatigue crack initiation and growth at nugget edge of spot welded la p joints, it should be considered in fatigue analysis. Thus, accurate prediction of residual stress is very important. In this study, nonlinear finite element analysis on welding residual stress generated in process of the spot welding was conducted, and their results were compared with experimental data measured by X-ray diffraction method. By using their results, the maximum principal stress considered welding residual stress at nugget edge of the spot welded lap joint subjected to tension-shear load was calculated by superposition method. And, the $\Delta$P- $N_f$ relations obtained through fatigue, tests on the IB-type spot welded lap joints was systematically rearranged with the maximum principal stress considered welding residual stress. From the results, it was found th2at fatigue strength of the IB-type spot welded lap joints could be systematically and more reasonably rearranged by the maximum principal stress($\sigma$1max-res considered welding residual stress at nugget edge of the spot welding point.