• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.5 no.3
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• pp.164-168
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• 2012

LDPC decoder architectures are generally classified into serial, parallel and partially parallel architectures. Conventional method of LDPC decoding in general give rise to a large number of computation operations, mass power consumption, and decoding delay. It is necessary to reduce the iteration numbers and computation operations without performance degradation. This paper studies Horizontal Shuffle Scheduling (HSS) algorithm. In the result, number of iteration is half than conventional algorithm without performance degradation. Finally, this paper present design methodology of high-speed LDPC decoder and confirmed its throughput is up to about 600Mbps.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.5 s.335
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• pp.39-46
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• 2005

It is well known the fact that turbo codes has better performance as the number of iteration and the interleaver size increases in the AWGN channel environment. However, as the number of iteration and the interleaver size are increased, it is required much delay and computation for iterative decoding. Therefore, it is important to devise an efficient criterion to stop the iteration process and prevent unnecessary computations and decoding delay. In this paper, it proposes the efficient iterative decoding stop criterion using the absolute mean value of LLR difference. It is verifying that the proposal iterative decoding stop criterion can be reduced the average iterative decoding number compared to conventional schemes with a negligible degradation of the error performance.

• Journal of Communications and Networks
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• v.17 no.4
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• pp.351-361
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• 2015

In this paper, a new decoding scheme is proposed to improve the error correcting performance of low-density parity-check (LDPC) codes in high signal-to-noise ratio (SNR) region by using post-processing. It behaves as follows: First, a conventional LDPC decoding is applied to received LDPC codewords one by one. Then, we count the number of word errors in a predetermined number of decoded codewords. If there is no word error, nothing needs to be done and we can move to the next group of codewords with no delay. Otherwise, we perform a proper post-processing which produces a new soft-valued codeword (this will be fully explained in the main body of this paper) and then apply the conventional LDPC decoding to it again to recover the unsuccessfully decoded codewords. For the proposed decoding scheme, we adopt a simple product code structure which contains LDPC codes and simple algebraic codes as its horizontal and vertical codes, respectively. The decoding capability of the proposed decoding scheme is defined and analyzed using the parity-check matrices of vertical codes and, especially, the combined-decodability is derived for the case of single parity-check (SPC) codes and Hamming codes used as vertical codes. It is also shown that the proposed decoding scheme achieves much better error correcting capability in high SNR region with little additional decoding complexity, compared with the conventional LDPC decoding scheme.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.61-64
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• 1999

The turbo code appropriate to IMT-2000 is known to have a good performance whenever the size of frame increases. But it is not appropriate to a sort of video service to need real time because of decoding complexity and long delay time by the size of frame. Therefore this paper proposes decoding decision algorithm of short frame in which soft output is weighted according to iteration number in turbo decoder. Performance of the proposed algorithm is analysed in the AWGN channel when short length of frame is 100, 256, 640. As the result. it is appeared that the proposed decoding decision algorithm has improved in BER other than in the existing MAP decoding algorithm.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.05a
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• pp.753-757
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• 2003

In this paper, We propose an efficient iteration decoding control method with variable iteration decoding for iteration codes decoding. As the number of iterations increases, the bit error rate and frame error rate of the decoder decrease and the incremental improvement gradually diminishes. However, as the iteration decoding number is increase, it require much delay and amount of processing for decoding. Thus we propose variable iteration control method to adapt variation of channel using Frame Error-Check indicator. Therefore, the CRC method requires the fewest iterations and less computation than the CE method and the SCR methods.

• The Transactions of the Korea Information Processing Society
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• v.7 no.2
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• pp.536-541
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• 2000

Turbo code has excellent decoding performance but had limitations for real time communications because of the system complexity and time delay in decoding procedure. To overcome this problem, a new SRI(Semi-Random Interleaver) algorithm which realize the reduction of the interleaver size is proposed for reducing the time delay during the decoding prodedure. SRI compose the interleaver 0.5 size from the input data sequence. In writing the interleaver, data is recorded by row such as block interleaver. But, in reading, data is read by randomly and the text data is located by the just address simultaneously. Therefore, the processing time of with the preexisting method such as block, helical random interleaver.

• ETRI Journal
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• v.35 no.4
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• pp.710-713
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• 2013

We propose a new space-time block coding (STBC) for asynchronous cooperative systems in full-duplex mode. The orthogonal frequency division multiplexing (OFDM) transmission technique is used to combat the timing errors from the relay nodes. At the relay nodes, only one OFDM time slot is required to delay for a pair-wise symbol swap operation. The decoding complexity is lower for this new STBC than for the traditional quasi-orthogonal STBC. Simulation results show that the proposed scheme achieves excellent performances.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.14 no.4
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• pp.141-148
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• 2004

This paper proposes an IPSec accelerator performance analysis model based a queue model. It assumes Poison distribution as its input traffic load. The decoding delay is employed as a performance analysis measure. Simulation results based on the proposed model show around 15% differences with respect to actual measurements on field traffic for the BCM5820 accelerator device. The performance analysis model provides with reasonable hardware structure of network servers, and can be used to span design spaces statistically.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.8A
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• pp.1254-1264
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• 2000

In this paper, we propose a new turbo interleaver and an efficient iteration control method with low complexity for turbo decoding. Turbo codes has better performance as the number of iteration and the interleaver size increases. However, as the interleaver size is increased, it require much delay and computation for decoding. Thus we propose a new efficient turbo magic interleaver using the Magic square matrix. Simulation results show that the proposed interleaver realizes a good performance like GF, Mother interleaver proposed to IMT-2000. And as the decoding approaches the performance limit, any further iteration results in very little improvement. Therefore, we propose an efficient algorithm of decoding that can reduce the delay and computation. Just like the conventional stop criterion, it effectively stop the iteration process with very little performance degradation.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.5 s.347
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• pp.121-127
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• 2006

It is well known the fact that turbo codes has better performance as the number of iteration and the interleaver size increases in the AWGN channel environment. However, as the number of iteration and the interleaver size are increased, it is required much delay and computation for iterative decoding. Therefore, it is important to devise an efficient criterion to stop the iteration process and prevent unnecessary computations and decoding delay. In this paper, it proposes the efficient stop criterion algorithm for turbo codes using the maximum sign change of LLR. It is verifying that the proposal variable iterative decoding controller can be reduced the average iterative decoding number compared to conventional schemes with a negligible degradation of the error performance.