• Title/Summary/Keyword: Data display

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A Multi-Application Controller for SAGE-enabled Tiled Display Wall in Wide-area Distributed Computing Environments

  • Fujiwara, Yuki;Date, Susumu;Ichikawa, Kohei;Takemura, Haruo
    • Journal of Information Processing Systems
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    • v.7 no.4
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    • pp.581-594
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    • 2011
  • Due to the recent advancement of networking and high-performance computing technologies, scientists can easily access large-scale data captured by scientific measurement devices through a network, and use huge computational power harnessed on the Internet for their analyses of scientific data. However, visualization technology, which plays a role of great importance for scientists to intuitively understand the analysis results of such scientific data, is not fully utilized so that it can seamlessly benefit from recent high-performance and networking technologies. One of such visualization technologies is SAGE (Scalable Adaptive Graphics Environment), which allows people to build an arbitrarily sized tiled display wall and is expected to be applied to scientific research. In this paper, we present a multi-application controller for SAGE, which we have developed, in the hope that it will help scientists efficiently perform scientific research requiring high-performance computing and visualization. The evaluation in this paper indicates that the efficiency of completing a comparison task among multiple data is increased by our system.

Gated Recurrent Unit based Prefetching for Graph Processing (그래프 프로세싱을 위한 GRU 기반 프리페칭)

  • Shivani Jadhav;Farman Ullah;Jeong Eun Nah;Su-Kyung Yoon
    • Journal of the Semiconductor & Display Technology
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    • v.22 no.2
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    • pp.6-10
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    • 2023
  • High-potential data can be predicted and stored in the cache to prevent cache misses, thus reducing the processor's request and wait times. As a result, the processor can work non-stop, hiding memory latency. By utilizing the temporal/spatial locality of memory access, the prefetcher introduced to improve the performance of these computers predicts the following memory address will be accessed. We propose a prefetcher that applies the GRU model, which is advantageous for handling time series data. Display the currently accessed address in binary and use it as training data to train the Gated Recurrent Unit model based on the difference (delta) between consecutive memory accesses. Finally, using a GRU model with learned memory access patterns, the proposed data prefetcher predicts the memory address to be accessed next. We have compared the model with the multi-layer perceptron, but our prefetcher showed better results than the Multi-Layer Perceptron.

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Motion Blur Measurement with a High-Speed Camera

  • Laur, Juergen;Becker, Michael E.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08b
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    • pp.1135-1138
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    • 2007
  • This paper presents motion picture artifacts measured with a high-speed camera. Measurement results of the high-speed camera on moving targets will be evaluated and compared with motion blur data derived from step responses measured on stationary test patterns with a spot-photodetector.

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The Implementation of Communication Protocol for Semiconductor Equipments using Directed Diffusion (직접 확산 방식을 이용한 반도체 장비 통신 프로토콜 구현)

  • Kim, Doo Yong;Cho, Hyun Chan
    • Journal of the Semiconductor & Display Technology
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    • v.12 no.2
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    • pp.39-43
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    • 2013
  • The semiconductor equipments generate necessary data through communication networks for the effective manufacturing processes and automation of semiconductor equipments. For transferring data between semiconductor equipments and sending data to monitor equipments, several standards for communication protocols have been proposed. Communication networks in semiconductor manufacturing systems will transmit a lot of data traffic, which can be vulnerable in data delay and network failure. Therefore, it is required that data traffic need to be distributed. To accomplish this objective, we recommend the use of a redundant and valuable communication path which is constructed by a wireless sensor network. In this paper, the directed diffusion method for wireless sensor networking is suggested for networking semiconductor equipments. It is shown that how the directed diffusion is employed to connect semiconductor equipments. Also, we show how to implement the SECS of semiconductor equipments communication protocols based on the directed diffusion.

Data management system for integrated control system (데이터베이스를 이용한 통합제어시스템 용(用) 공정 데이터 관리 시스템)

  • Shin, Kyeong-Bong;Huh, Woo-Jung;Kim, Moon-Cheol;Kim, Eung-Seok;Kim, Wang-Kil;Hwang, Jin-Sik
    • Proceedings of the KIEE Conference
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    • 1996.07b
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    • pp.1260-1262
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    • 1996
  • There has been much interested on the issues of designing and implementing the data acquisition and display system. This paper describes how to acquire and manage the data to be generated from sensor sources in a manufacturing process. The functionality of this data management system is composed of data acquisition, database management, processing and display of the available data. Also, this system has a adaptability to be carried throughout configuration management.

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Performance Analysis and Identifying Characteristics of Processing-in-Memory System with Polyhedral Benchmark Suite (프로세싱 인 메모리 시스템에서의 PolyBench 구동에 대한 동작 성능 및 특성 분석과 고찰)

  • Jeonggeun Kim
    • Journal of the Semiconductor & Display Technology
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    • v.22 no.3
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    • pp.142-148
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    • 2023
  • In this paper, we identify performance issues in executing compute kernels from PolyBench, which includes compute kernels that are the core computational units of various data-intensive workloads, such as deep learning and data-intensive applications, on Processing-in-Memory (PIM) devices. Therefore, using our in-house simulator, we measured and compared the various performance metrics of workloads based on traditional out-of-order and in-order processors with Processing-in-Memory-based systems. As a result, the PIM-based system improves performance compared to other computing models due to the short-term data reuse characteristic of computational kernels from PolyBench. However, some kernels perform poorly in PIM-based systems without a multi-layer cache hierarchy due to some kernel's long-term data reuse characteristics. Hence, our evaluation and analysis results suggest that further research should consider dynamic and workload pattern adaptive approaches to overcome performance degradation from computational kernels with long-term data reuse characteristics and hidden data locality.

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Flexible Active-Matrix Electrophoretic Display With Integrated Scan-And Data-Drivers

  • Miyazaki, Atsushi;Kawai, Hideyuki;Miyasaka, Mitsutoshi;Inoue, Satoshi;Shimoda, Tatsuya
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.153-156
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    • 2004
  • A newly developed flexible active-matrix (AM-) electrophoretic display (EPD) is reported. The AM-EPD features: (1) low-temperature polycrystalline silicon (LTPS) thin film transistor (TFT) technology, (2) fully integrated scan- and data-drivers, (3) flexibility and light-weight realized by transferring the whole circuits onto a plastic substrate using $SUFTLA^{TM}$ (Surface Free Technology by Laser Annealing/Ablation) process. A large storage capacitor is formed in each pixel so that driving electric field can be kept sufficiently strong during a writing period Two-phase driving scheme, a reset-phase which erases a previous image and a writing-phase for writing a new image, was chosen to cope with EPD's high driving voltage. The flexible AM-EPD has been successfully operated with a driving voltage of 8.5 V.

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Pseudo 480-Hz Driving Method for Digital Mode Grayscale Displays

  • Ryeom, Jeongduk
    • Journal of Electrical Engineering and Technology
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    • v.8 no.6
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    • pp.1462-1467
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    • 2013
  • A pseudo 480-Hz drive method has been proposed to reduce the dynamic false contour noise that occurs on flat panel displays with displaying grayscale image in the digital mode, such as plasma display panels. The proposed method makes the image movements nearly continuous by rearranging the 8-bit image data displayed for 1 TV field into 8 subfields. The position of the image data rearranged in subfields has been optimized on the basis of the speed of the moving image by computer simulations for the dynamic false contour noise. It is verified that a significant reduction in the dynamic false contour noise is achieved with the proposed method as compared to the conventional noise reduction technologies. Moreover, to reduce the noise in digital mode displays, the proposed technology requires only 8 subfields. Therefore, there is no reduction in the brightness of the image.

A Psychophysical Approach to the Evaluation of Perceived Focusing Quality of CRT Displays

  • Yoon, Kwang-Ho;Kim, Sang-Ho;Chang, Sung-Ho
    • Journal of Information Display
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    • v.5 no.3
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    • pp.35-40
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    • 2004
  • In this study, we collected data used to formulate the relationship between quantitative metrological parameters in CRT display and the perceived focus quality. Human perception of the focusing quality was evaluated in terms of user feedback scores regarding the character legibility from four highly trained inspectors. Thirteen CRT monitors from five different manufacturers were compared relatively with respect to the norm monitor. The profile of electron beam such as spot size and the shape of distribution made by electron beam, contrast, convergence of RGB beams, and luminance characteristics were measured using a precision measurement system. Linear regression analysis and artificial neural network models were used to formulate the relationship between human perception and the quantitative measurements. The accuracy of the formulated linear regression model ($R^2$=0.515) was not satisfactory but the nonlinear neural network model ($R^2$=0.716) was fairly convincing and robust even the utilized data included subjective differences.

Analytic Map Algorithms of DDI Chip Test Data (DDI 칩 테스트 데이터 분석용 맵 알고리즘)

  • Hwang Kum-Ju;Cho Tae-Won
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.1 s.14
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    • pp.5-11
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    • 2006
  • One of the most important is to insure that a new circuit design is qualified far release before it is scheduled for manufacturing, test, assembly and delivery. Due to various causes, there happens to be a low yield in the wafer process. Wafer test is a critical process in analyzing the chip characteristics in the EDS(electric die sorting) using analytic tools -wafer map, wafer summary and datalog. In this paper, we propose new analytic map algorithms for DDI chip test data. Using the proposed analytic map algorithms, we expect to improve the yield, quality and analysis time.

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