• Title/Summary/Keyword: DSPs

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A Study on Development of a Vision System for the Test of Steam Generator in Nuclear Power Plants (원전 증기 발생기 세관 검사용 비젼 시스템 개발에 관한 연구)

  • 왕한홍
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 1996.03a
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    • pp.200-204
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    • 1996
  • It is a great number of problem for the man to perform maintenance and repairing work owing to radioactive effusion for a nuclear fuel and the pollution of an related equipment in nuclear power plants. Therefore, the vision processing system presented in this research requires to maintain the good performance under the radioactive circumstances and to safety the real time processing system presented in this research requires to maintain the good performance under the radioactive circumstances and to safety the real time processing. The proposed vision scheme adapts the gradient and Laplacian operator to perform the high speed processing in an edge detection and the centroid formula at each direction to obtain the center position of a holes using DSPs

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Design of a Real Time Adaptive Controller for Industrial Robot Using Digital Signal Processor (디지털 신호처리기를 사용한 산업용 로버트의 실시간 적응제어기 설계)

    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.5 no.4
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    • pp.26-37
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    • 1996
  • This paper presents a new approach to the design of adaptive control system using DSPs(TMS320C30) for robotic manipulators to achieve trajectory tracking by the joint angles Digital signal processors are used in implementing real time adaptive control algorithms to provide an enhanced motion control for robotic manipulators. In the proposed control scheme adaptation laws are derived from the improved Lyapunov second stability analysis method based on the adaptive model reference control theory. The adaptive controller consists of an adaptive feedforward controller. feedback controller. and PID type time-varying auxiliary control elements. The proposed adaptive control scheme is simple in structure, fast in computation, and suitable for implementation of real-time control. Moreover, this scheme does not require a an accurate dynamic modeling, nor values of manipulator parameters and payload. Performance of the adaptive controller is illustrated by simulation and experimental results for a SCARA robot.

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TDMA jammer suppression on CDMA overlay

  • 김동구;박형일
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.4
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    • pp.961-971
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    • 1996
  • The effect of inband TDMA narrow band jammers to DS-CDMA system performance and the suppression techniques are investigated using Monte Carlo simulations. TIA stantard North American Digital Cellular wea used as jammer. Levinson Dubin and conventional recursive least square algorithm were emphasized since these techniques can be implemented with a few DSPs for CDMA application. Two filter structures, i.e., complex suppression filter and real suppression filter in each inphase and quadrature channels, are investigated and their performances are compared. Complex suppression filter with Levinson Durbin algorithm of 20msec updata rate is the most promising with respect to implementation and performance poit of view. Implementation feasibility is discussed and the channel capacity lost by suppression is computed.

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Radar Signal Processor Design Using FPGA (FPGA를 이용한 레이더 신호처리 설계)

  • Ha, Changhun;Kwon, Bojun;Lee, Mangyu
    • Journal of the Korea Institute of Military Science and Technology
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    • v.20 no.4
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    • pp.482-490
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    • 2017
  • The radar signal processing procedure is divided into the pre-processing such as frequency down converting, down sampling, pulse compression, and etc, and the post-processing such as doppler filtering, extracting target information, detecting, tracking, and etc. The former is generally designed using FPGA because the procedure is relatively simple even though there are large amounts of ADC data to organize very quickly. On the other hand, in general, the latter is parallel processed by multiple DSPs because of complexity, flexibility and real-time processing. This paper presents the radar signal processor design using FPGA which includes not only the pre-processing but also the post-processing such as doppler filtering, bore-sight error, NCI(Non-Coherent Integration), CFAR(Constant False Alarm Rate) and etc.

A study about rotor position estimation enhance using IQ math in DSP (DSP 내의 IQ math를 이용한 회전자 위치 추정 정밀도 향상에 관한 연구)

  • Jang, Joong-Hack;Lee, Kwang-Ho;Hong, Sun-Ki
    • Proceedings of the KIEE Conference
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    • 2005.10c
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    • pp.98-100
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    • 2005
  • DSPs used at motor control are usually fixed point processor. They need scaling because they cannot excute floating point calculation. Scaling for floating point calculation makes the DSP's speed down, complex coding and etc. Therefore the IQ math is adopted. IQ math makes the fixed point processor possible to calculate the floating point math. In addition, IQ math can reduce memory usage and be more faster than that without IQ math. It seems that IQ math is appropriate in motor position control. In comparison of the position calculation between the IQ math, math function and the sine table, the method using IQ math is superior than other methods.

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Design of a DSP-Based Adaptive Controller for Real Time Dynamic Control of AM1 Robot

  • S. H. Han;K. S. Yoon;Lee, M. H.;Kim, S. K.
    • 제어로봇시스템학회:학술대회논문집
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    • 1998.10a
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    • pp.100-104
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    • 1998
  • This paper describes the real-time implementation of an adaptive controller fur the robotic manipulator. Digital signal processors(DSPs) are special purpose micro-processors that are particularly powerful for intensive numerical computations involving sums and products of variables. TMS320C50 chips are used in implementing real time adaptive control algorithms to provide an enhanced motion for robotic manipulators. In the proposed scheme, adaptation laws are derived from the improved Lyapunov second stability analysis based on the direct adaptive control theory. The adaptive controller consists of an adaptive feedforward controller and feedback controller. The proposed control scheme is simple in structure, fast in computation, and suitable for real-time control. Moreover, this scheme does not require any accurate dynamic modeling, nor values of manipulator parameters and payload. Performance of the adaptive controller is illustrated by simulation and experimental results for a assembling robot.

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Design of a Low Power Reconfigurable DSP with Fine-Grained Clock Gating (정교한 클럭 게이팅을 이용한 저전력 재구성 가능한 DSP 설계)

  • Jung, Chan-Min;Lee, Young-Geun;Chung, Ki-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.2
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    • pp.82-92
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    • 2008
  • Recently, many digital signal processing(DSP) applications such as H.264, CDMA and MP3 are predominant tasks for modern high-performance portable devices. These applications are generally computation-intensive, and therefore, require quite complicated accelerator units to improve performance. Designing such specialized, yet fixed DSP accelerators takes lots of effort. Therefore, DSPs with multiple accelerators often have a very poor time-to-market and an unacceptable area overhead. To avoid such long time-to-market and high-area overhead, dynamically reconfigurable DSP architectures have attracted a lot of attention lately. Dynamically reconfigurable DSPs typically employ a multi-functional DSP accelerator which executes similar, yet different multiple kinds of computations for DSP applications. With this type of dynamically reconfigurable DSP accelerators, the time to market reduces significantly. However, integrating multiple functionalities into a single IP often results in excessive control and area overhead. Therefore, delay and power consumption often turn out to be quite excessive. In this thesis, to reduce power consumption of dynamically reconfigurable IPs, we propose a novel fine-grained clock gating scheme, and to reduce size of dynamically reconfigurable IPs, we propose a compact multiplier-less multiplication unit where shifters and adders carry out constant multiplications.

Parameter calibrations and application of micromechanical fracture models of structural steels

  • Liao, Fangfang;Wang, Wei;Chen, Yiyi
    • Structural Engineering and Mechanics
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    • v.42 no.2
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    • pp.153-174
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    • 2012
  • Micromechanical facture models can be used to predict ductile fracture in steel structures. In order to calibrate the parameters in the micromechanical models for the largely used Q345 steel in China, uniaxial tensile tests, smooth notched tensile tests, cyclic notched bar tests, scanning electron microscope tests and finite element analyses were conducted in this paper. The test specimens were made from base metal, deposit metal and heat affected zone of Q345 steel to investigate crack initiation in welded steel connections. The calibrated parameters for the three different locations of Q345 steel were compared with that of the other seven varieties of structural steels. It indicates that the toughness index parameters in the stress modified critical strain (SMCS) model and the void growth model (VGM) are connected with ductility of the material but have no correlation with the yield strength, ultimate strength or the ratio of ultimate strength to yield strength. While the damage degraded parameters in the degraded significant plastic strain (DSPS) model and the cyclic void growth model (CVGM) and the characteristic length parameter are irrelevant with any properties of the material. The results of this paper can be applied to predict ductile fracture in welded steel connections.

The Design of Expansible Digital Pulse Compressor Using Digital Signal Processors (DSP를 이용한 확장 가능한 디지털 펄스압축기 설계)

  • 신현익;류영진;김환우
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.3
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    • pp.93-98
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    • 2003
  • With the improvement of digital signal processors, digital pulse compressor(DPC) is widely used in radar systems. The DPC can be implemented by using FIR filter algorithm in time domain or FFT algorithm in frequency domain. This paper designs an expansible DPC using multiple DSPs. With ADSP-21060 of Analog Devices Inc., the computation time as a function of the number of received range cells and FIR filter tap is compared and analyzed in time domain using C-language and assembly language. therefore, when radar system parameters are determined, the number of DSP's required to implement DPC can be easily estimated.

Fault Detection and Diagnosis of CAN-Based Distributed Systems for Longitudinal Control of All-Terrain Vehicle(ATV) (무인 ATV의 종 방향 제어를 위한 CAN 기반 분산형 시스템의 고장감지 및 진단)

  • Kim, Soon-Tae;Song, Bong-Sob;Hong, Suk-Kyo
    • Journal of Institute of Control, Robotics and Systems
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    • v.14 no.10
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    • pp.983-990
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    • 2008
  • This paper presents the fault detection and diagnosis(FDD) algorithm to enhance reliability of a longitudinal controller for an autonomous All-Terrain Vehicle(ATV). The FDD is designed to monitor and identify faults which may occur in distributed hardware used for longitudinal control, e.g., DSPs, CAN, sensors, and actuators. The proposed FDD is an integrated approach of decentralized and centralized FDD. While the former is processed in a DSP and suitable to detect faults in a single hardware, it is sensitive to noise and disturbance. On the other hand, the latter is performed via communication and it detects and diagnoses faults through analyzing concurrent performances of multiple hardware modules, but it is limited to isolate faults specifically in terms of components in the single hardware. To compensate for disadvantages of each FDD approach, two layered structure including both decentralized and centralized FDD is proposed and it allows us to make more robust fault detection and more specific fault isolation. The effectiveness of the proposed method will be validated experimentally.