• Journal of the Korea Academia-Industrial cooperation Society
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• v.7 no.3
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• pp.325-331
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• 2006

This paper suggests the design methodology of a robust controller based on disturbance rejection controller using DSP. In this paper, we discuss process to put the disturbance rejection controller into practice, and examine the performance of disturbance rejection controller by implementing it on DSP based hardware to evaluate usefulness of controller. As a result, the proposed robust controller can not only stabilize system against disturbance ,but it improve controlling performance. And also, it shows convenient to put into practical use of industrial sites due to its easy implementation on the hardware.

• Journal of Korea Society of Digital Industry and Information Management
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• v.15 no.4
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• pp.93-101
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• 2019

This paper presents a software design and implementation of software-defined radio based IEEE 802.11ac encoder using Texas Instruments TMS320C6670 digital signal processor (DSP) platform. In this paper, the implemented encoder has the capability of generating all the signals consisting of preamble field and data field under different modulation & coding scheme in the IEEE 802.11ac standard. Moreover, the flexibility in choosing different rate, bandwidth, or mode can also be achieved by software reconfiguration using the DSP. As a result, by utilizing the computing power provided by multi-cores as well as the FFT coprocessors in the DSP, the required maximum throughput 78Mbps can be fully reached within 4 ㎲ for each OFDM symbol in the case of 20MHz bandwidth of IEEE 802.11ac.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2005.11a
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• pp.81-87
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• 2005

This paper addresses the CAN based networked intelligent multi-motor control system using DSP2812 microprocessor. CAN built in DSP2812 microprocessor is used to control and monitor the multi-motor system with the inverter driving system. CAN network implementation schemes and the algorithm for multi-motor control and monitoring is also developed. We configure the multi-motor control experimental system to verify the proposed algorithm and the reliability of CAN networks system in the various operation of two induction motors. The experimental results show that CAN based networked intelligent multi-motor control system using DSP2812 microprocessor can carry out the real-time network based control in various speed range and the position control of induction motors.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.186-189
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• 2019

The technique named CORD is an algorithm that optimizes resources of Data Service Platform(DSP) in real time, and it has been developed for enhancing operability of DSP of Korean e-Navigation Project performed by Hanwha Systems and Ministry of Oceans and Fisheries(MOF) since 2016. It plays a critical role to recognize the state of DSP in early time and handling problems immediately when it occurs logical, physical error in order to make DSP steady state condition, which has something in common with maximizing operability of DSP and seamless maritime service to various ships in the sea. Therefore, as developing a noble technique that makes DSP steady state by diagnosing resource and operation status of DSP as well as by reconfiguring service queue optimally in real time, DSP can have shorter response time and higher chance of providing proper maritime service to ships in voyage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.11
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• pp.74-84
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• 2000

This paper deals with procedures for design and implementation of a DSP, which is compatible with TMS320C30 DSP. CBS(Cycle Based Simulator) is developed to study the architecture of the target DSP. The simulator gives us detailed information such as function block operation, control signal values, register condition, bus and memory values when a instruction is being carried out. RTL design is carried out by VHDL. Logic simulation and hardware emulation are employed to verify proper operation of the design. The DSP is fabricated with 0.6${\mu}m$ CMOS technology. The Chip has 450,000 gates complexity, $9{\times}9mm^2$ area, 20 MIPS operation speed. It is confirmed by running 109 instructions out of 114 instructions and 13 kinds of algorithm that the developed DSP has compatibility with TMS320C30.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.11
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• pp.31-38
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• 1998

This paper deals with CBS(Cycle Base Simulator) design of a 32 bit floating point DSP(Digital Signal Processor). The CBS has been developed for TMS320C30 compatible DSP and will be used to confirm the architecture, functions of sub-blocks, and control signals of the chip before the detailed logic design starts with VHDL. The outputs from CBS are used as important references at gate level design step because they give us control signals, output values of important blocks, values from internal buses and registers at each pipeline step, which are not available from the commercial simulator of DSP. In addition to core functions, it has various interfaces for efficient execution and convenient result display, CBS is verified through comparison with results from the commercial simulator for many application algorithms and its simulation speed is as fast as several tenth of that of logic simulation with VHDL. CBS in this work is for a specific DSP, but the concept may be applicable to other VLSI design.

• Journal of the Institute of Convergence Signal Processing
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• v.14 no.1
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• pp.62-69
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• 2013

This paper proposes real-time video transmission system by the car-mounted cameras based on MOST Network. Existing vehicles transmit videos by connecting the car-mounted cameras in the form of analog. However, the increase in the number of car-mounted cameras leads to development of the network to connect the cameras. In this paper, DSP is applied to process MPEG 2 encoding/decoding for real-time video transmission in a short period of time. MediaLB is employed to transfer data stream between DSP and MOST network controller. During this procedure, DSP cannot transport data stream directly from MediaLB. Therefore, FPGA is used to deliver data stream transmitting MediaLB to DSP. MediaLB is designed to streamline hardware/software application development for MOST Network and to support all MOST Network data transportation methods. As seen in this paper, the test results verify that real-time video transmission using proposed system operates in a normal matter.

• Proceedings of the IEEK Conference
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• 2003.07e
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• pp.1956-1959
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• 2003

본 논문에서는 HDTV(High Definition TV) 방송수신을 위한 DSP(Digital Signal Processor)기반의 HD급 비디오/오디오 디코더 시스템을 개발하고 그 성능을 확인하였다. DSP 플랫폼은 TI(Texas Instrument)사의 TMS320C6415를 대상으로 하였으며 TI의 DSP RTOS인 DSP/ BIOS를 이용하여 방송스트림인 TS(Transport Stream)을 분리하기 위한 TS Demuxer, MPEG-2 비디오 디코더 및 AC-3 오디오디코더 알고리즘을 통합하였으며, 각각의 알고리즘은 대상 DSP플랫폼인 TMS320C64x에 맞게 고정소수점 구조화 및 최적화를 실시하였다. 테스트를 위한 시스템은 스트리밍을 위한 호스트 PC와 PCI(Peripheral Component Interconnect)버스를 통해 연결된 DSP보드로 구성하였으며 실제 HDTV당송용 스트림과 SD(Standard Definition)급 스트림을 이용하여 성능을 확인하였다.

• Proceedings of the KIEE Conference
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• 2006.04a
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• pp.255-257
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• 2006

This paper proposed a platform which includes both Network processor and DSP for flexible IED. The Network processor is one of the Intel's IXP4XX Product Line family and the DSP is one of the TI's C6000 family. An embedded Linux is ported in Network processor so that a DSP program can be downloaded to Network processor through ethernet and then downloaded to DSP. Using this method, various algorithms according to IED can be applied to the Network processor board. Maximum ten ADCs can be connected because there is a CPLD between DSP and ADC. That is, the network processor board which can measure maximum 40 channels is implemented. In DSP program, thread and double buffering methods are used not to miss voltage samples. The Network processor board is verified using a method that eight channel voltage signals converted to digital are transmitted to server through both DSP and IXP425.

• Journal of Industrial Technology
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• v.29 no.A
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• pp.95-100
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• 2009

In this paper, we implemented a speaker-independent speech recognizer using the TMS320F28335 DSP which is optimized for control applications. For this implementation, we used a small-sized commercial DSP module and developed a peripheral board including a codec, signal conditioning circuits and I/O interfaces. The speech signal digitized by the TLV320AIC23 codec is analyzed based on MFCC feature extraction methed and recognized using the continuous-density HMM. Thanks to the internal SRAM and flash memory on the TMS320F28335 DSP, we did not need any external memory devices. The internal flash memory contains ADPCM data for voice response as well as HMM data. Since the TMS320F28335 DSP is optimized for control applications, the recognizer may play a good role in the voice-activated control areas in aspect that it can integrate speech recognition capability and inherent control functions into the single DSP.