• Journal of KIISE:Computer Systems and Theory
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• v.27 no.4
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• pp.401-407
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• 2000

Modern microprocessors exploit instruction-level parallel processing to increase the performance. Especially VLIW processors supported by the parallelizing compiler are used more and more in specific applications such as high-end DSP and graphic processing. Bus-based VLIW architecture was proposed for these specific applications and it was designed to reduce the overhead of forwarding unit and the instruction width. In this paper, a optimizing scheduling compiler developed for the proposed bus-based VLIW processor is introduced. First, the method to model interconnections between buses and resource usage patterns is described. Then, on the basis of the modeling, machine-dependent optimization techniques such as bus-to-register promotion, copy coalescing and operand substitution were implemented. Optimization techniques for general-purpose VLIW microprocessors such as selective scheduling and enhanced pipelining scheduling(EPS) were also implemented. The experiment result shows about 20% performance gain for multimedia application benchmarks.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.2519-2523
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• 2003

Ultrasonic sensors are widely used in mobile robot applications to recognize external environments, because they are cheap, easy to use, and robust under varying lighting conditions. In most cases, a single ultrasonic sensor is used to measure the distance to an object based on time-of-flight (TOF) information, whereas multiple sensors are used to recognize the shape of an object, such as a corner, plane, or edge. However, the conventional sequential driving technique involves a long measurement time. This problem can be resolved by pulse coding ultrasonic signals, which allows multi-sensors to be fired simultaneously and adjacent objects to be distinguished. Accordingly, the current presents a new simultaneous coded driving system for an ultrasonic sensor array for object recognition in autonomous mobile robots. The proposed system is designed and implemented using a DSP and FPGA. A micro-controller board is made using a DSP, Polaroid 6500 ranging modules are modified for firing the coded signals, and a 5-channel coded signal generating board is made using a FPGA. To verify the proposed method, experiments were conducted in an environment with overlapping signals, and the flight distances for each sensor were obtained from the received overlapping signals using correlations and conversion to a bipolar PCM-NRZ signal.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1655-1666
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• 2015

This paper proposes a new approach of Field Programmable Gate Array (FPGA) controlled digital implementation of shunt active power filter (SAPF) under steady state and dynamic operations. Typical implementations of SAPF uses microprocessor and digital signal processor (DSP) but it limited for complex algorithm structure, absence of feedback loop delays and their cost can be exceed the benefit they bring. In this paper, the hardware resources of an FPGA are configured and implemented in order to overcome conventional microcontroller or digital signal processor implementations. This proposed FPGA digital implementation scheme has very less execution time and boosts the overall performance of the system. The FPGA controller integrates the entire control algorithm of an SAPF, including synchronous reference frame transformation, phase locked loop, low pass filter and inverter current controller etc. All these required algorithms are implemented with a single all-on chip FPGA module which provides freedom to reconfigure for any other applications. The entire algorithm is coded, processed and simulated using Xilinx 12.1 ISE suite to estimate the advantages of the proposed system. The coded algorithm is also defused on a single all-on-chip Xilinx Spartan 3A DSP-XC3SD1800 laboratory prototype and experimental results thus obtained match with simulated counterparts under the dynamic state and steady state operating conditions.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.1
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• pp.82-90
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• 2007

We introduce the concept of a remote distributed embedded system to integrated fieldbus based control systems in internet/Intranet. As a result, fieldbus systems are opened up for remote monitoring, remote maintenance, and remote control applications using state of the art Web-technology. This paper addresses the design of a remote distributed embedded system using Internet and CAN for multi-induction motor of Building and Industrial field. The fieldbus used the CAN based networked intelligent multi-motor control system using DSP2812 microprocessor. To build a remote distributed embedded system, the TCP/IP-CAN Gateway which converts a CAN protocol to TCP/IP protocol and vice verse, was designed. A experimental simulation system consists of a TCP/IP-CAN gateway in remote place and a command PC to be connected to Ethernet.

• IEMEK Journal of Embedded Systems and Applications
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• v.8 no.3
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• pp.129-136
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• 2013

In this paper, a motion control system based on 2-axis gimbal system is designed and implemented to drive a high speed and precision. The proposed system consists of the RS-422 interface, 2-axis gimbal platform, servo control unit integrated with a high speed DSP chip-set, servo amplifier unit, potentiometer sensor unit, and resolver sensor unit. The servo control unit using the high speed DSP firmware is designed to get a fast response without an overshoot with step input and a RMS error of low probability with ramp input. The servo amplifier unit using a voltage control is designed to resolve the zero-crossing distortion for precise motion. To verify the performance and stability of the implemented system, experiments are performed through a measurement of the time and frequency domain response in a laboratory environment by using a PXI(PCI eXtentions for Instrumentation).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.11
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• pp.85-95
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• 2000

FIR digital filter is one of important blocks in DSP application. For more effective operation, lots of architecture are proposed. In our paper, we proposed a high speed FIR filter with area efficiency. To fast operation, we used transposed form filter as basic architecute. And, we used dual path registers line to wupport variation of filter operation, and filter cascade is also considered. To reduce area, we adopted truncated Booth multiplier to our filter design. As a result, we showed that filter area is reduced when filter optimization using of dual path registers line and truncated multiplier with same constraints againt previous method.

• Journal of Electrical Engineering and Technology
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• v.10 no.3
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• pp.1383-1388
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• 2015

Proportional integral derivative (PID) control is one of the conventional control strategies. Industrial PID control has many options, tools, and parameters for dealing with the wide spectrum of difficulties and opportunities in manufacturing plants. It has a simple control structure that is easy to understand and relatively easy to tune. Injection mold is warming up to the idea of cycling the tool surface temperature during the molding cycle rather than keeping it constant. This “heating and cooling” process has rapidly gained popularity abroad. However, it has discovered that raising the mold wall temperature above the resin’s glass-transition or crystalline melting temperature during the filling stage is followed by rapid cooling and improved product performance in applications from automotive to packaging to optics. In previous studies, optimization methods were mainly selected on the basis of the subjective experience. Appropriate techniques are necessary to optimize the cooling channels for the injection mold. In this study, a digital signal processor (DSP)-based PID control system is applied to injection molding machines. The main aim of this study is to optimize the control of the proposed structure, including a digital PID control method with a DSP chip in the injection molding machine.

• Journal of the Institute of Convergence Signal Processing
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• v.9 no.3
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• pp.224-229
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• 2008

In the paper, a new Constraint algorithm is proposed to solve the fan-in problem occurred in the encoding circuitry of an ADC. The Flash ADC architecture uses a Double-Base Number System(DBNS). The DBNS has been known to represent the Multidimensional Logarithmic Number System (MDLNS) used for implementing the multiplier accumulator architecture of FIR filter in Digital Signal Processing (DSP) applications. The authors use the DBNS with the base 2 and 3 in designing ADC encoder circuits, which is called as Double Base Integer Encoder(DBIE). A symmetric map is analyzed first, and then asymmetric map is followed to provide addition ready DBNS for DSP circuitry. The simulation results of the DBIE circuits in 6-bit and 8-bit ADC show the effectiveness of the Constraint algorithm with $0.18{\mu}m$ CMOS technology. The DBIE yields faster processing speed compared to the speed of Fat Tree Encoder (FAT) circuits by 17% at more power consumption by 39%.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.5
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• pp.50-58
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• 2013

In this paper, we present the implementation result of an UWB terminal for mobile tactical networks. Considering the major characteristics of the terminals of tactical networks, i) targeting voice service, ii) pedestrian users, and iii) demanding high network fidelity, we designed all protocol layers from physical layer to applications layer. The designed terminal is implemented in forms of software and hardware with RF ASIC, FPGA, DSP, and GPP. The functionality of the implemented terminal is validated by successfully performing 1 to 1 and multi-hop voice communication test.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.2
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• pp.162-168
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• 2005

In this paper, a digital current mode control is designed for the power converter applications. The designed digital current mode controller is derived analytically from the continuous time small signal model of the power converters. Due to the small signal model based derivations of the control law, the designed control method can be applicable to boost, buck, and buck-boost converters. It is also proven that the controlled power converter employing the designed digital current mode controller is always stable regardless of an operating conditions. In order to show the usefulness of a designed controller, experiments are carried out using a 16bit DSP micro-processor, TMS320LF2406A.