• 제목/요약/키워드: DFT-based

검색결과 299건 처리시간 0.022초

VLSI 병렬 연산을 위한 여현 변환 알고리듬 (Discrete Cosine Transform Algorithms for the VLSI Parallel Implementation)

  • 조남익;이상욱
    • 대한전자공학회논문지
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    • 제25권7호
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    • pp.851-858
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    • 1988
  • In this paper, we propose two different VLSI architectures for the parallel computation of DCT (discrete cosine transform) algorithm. First, it is shown that the DCT algorithm can be implemented on the existing systolic architecture for the DFT(discrete fourier transform) by introducing some modification. Secondly, a new prime factor DCT algorithm based on the prime factor DFT algorithm is proposed. And it is shown that the proposed algorihtm can be implemented in parallel on the systolic architecture for the prime factor DFT. However, proposed algorithm is only applicable to the data length which can be decomposed into relatively prime and odd numbers. It is also found that the proposed systolic architecture requires less multipliers than the structures implementing FDCT(fast DCT) algorithms directly.

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순환 DFT에 기초한 광역 동기 위상 측정 장치의 ASIC 구현 (An ASIC implementation of Synchronized Phase Measurement Unit based on Sliding-DFT)

  • 김종윤;김석훈;장태규
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 하계학술대회 논문집 A
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    • pp.302-304
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    • 2001
  • 본 논문에서는 다 채널 위상 측정 장치를 전용하드웨어로 구현하기 위한 설계 구조에 대하여 제시하였으며, 연산량이 많은 곱셈기를 시분할에 의해 공유하는 구조를 제시하였다. 또한 페이저 측정을 위한 Sliding-DFT 알고리즘을 순환 구현할 경우의 근사 구현 오차에 관한 정량적인 연구를 수행하였다. 이러한 오차 영향의 해석을 기반으로 하여 곱셈기 공유 구조를 적용한 위상 측정 장치를 설계하고, 설계한 하드웨어의 내부동작을 보여주는 시뮬레이션을 통해 설계의 정확성을 확인하였다.

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The SrLiAl3N4:Eu2+ Phosphor Synthesized by the Raw Material Model Obtained by DFT Calculations

  • Park, Woon Bae
    • 한국세라믹학회지
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    • 제54권3호
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    • pp.217-221
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    • 2017
  • Improvement studies of existing phosphors are needed for use in light emitting diodes (LEDs). Among the phosphors discovered recently, the SLA ($SrLiAl_3N_4:Eu^{2+}$) is a phosphor that has a narrow width. It is now known as a good red phosphor that meets the industry's needs for warm white (color temperature ranging from 2700 to 4000 K) and high CRI (> 80). However, SLA phosphors are obtained from difficult synthetic methods. All commercially available phosphors should be derived from the general solid state synthesis method. The phosphors produced by difficult synthetic methods will inevitably fall out of price competitiveness and will be scrapped. This study succeeded in synthesizing SLA ($SrLiAl_3N_4:Eu^{2+}$) phosphors by using a general solid phase synthesis method based on the reaction energy obtained from DFT calculations. As a result, we found an optimal solid state synthesis method for SLA phosphors.

A Study of Mg Capping Inside p-tert-butylcalix[4]arene Adsorbed on a Ge(100) Surface

  • Shin, Minjeong;Lee, Myungjin;Lee, Hangil
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.135-135
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    • 2013
  • The electronic and adsorption structures of Mg and p-tert-butylcalix[4]arene (p-TBCA) adsorbed onto a Ge(100) surface under a variety of sample conditions were characterized using high-resolution photoemission spectroscopy (HRPES) and their corresponding DFT calculation results. Interestingly, after 0.10 ML p-TBCA molecules had been adsorbed onto a Ge(100) surface, subsequent adsorption of a small amount of metallic Mg (~0.10 ML) resulted in the formation of a capped structure inside the pre-adsorbed p-TBCA molecules. The adsorption structures resulting from further deposition of Mg (~0.50 ML) onto the Ge(100) surface were monitored based on the surface charge state and Mg 2s core level spectrum. Work function measurements clearly indicated the electronic structures of the Mg and p-TBCA adsorbed onto the Ge(100) surface. Moreover, we confirmed that three different adsorption structures are experimentally favorable at room temperature through DFT calculation results.

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단일 톤 신호의 페이저 측정기법 및 FPGA구현 (An FPGA implementation of phasor measurement algorithm for single-tone signal)

  • 안병선;김종윤;장태규
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(4)
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    • pp.171-174
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    • 2002
  • This paper presents an implementation method of phasor measurement device, which is based on the FPGA implementation of the sliding-DFT The design is verified by the timing simulation of its operation. The error effect of coefficient approximation and frequency deviation in the recursive implementation of the sliding-DFT is analytically derived and verified with the computer simulations.

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DFT계수를 이용한 홍채 인식 (Iris Pattern Recognition Using the DFT Coefficients)

  • 고현주;전명근
    • 한국지능시스템학회:학술대회논문집
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    • 한국퍼지및지능시스템학회 2001년도 춘계학술대회 학술발표 논문집
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    • pp.237-240
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    • 2001
  • In this work, we will present an iris pattern recognition method as a biometrically based technology for personal identification and authentication. For this, we propose a new algorithm for extraction unique feature from images of the iris of the human eye and representing these feature using the discrete fourier transform. From the computational simplicity of the adopted transform, we can obtain more fast and efficient results than previous ones.

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D2D 통신에서 사이드링크를 위한 DFT 기반 채널 추정 기법 (DFT-based Channel Estimation Scheme for Sidelink in D2D Communication)

  • 문상미;추명훈;김한종;김대진;김철성;황인태
    • 전자공학회논문지
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    • 제52권12호
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    • pp.22-31
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    • 2015
  • 최근, 3GPP (3rd Generation Partnership Project) 에서는 폭발적으로 증가하고 있는 모바일 데이터 트래픽을 수용하기 위하여 기기 간 직접(Device-to-Device, D2D) 통신을 개발하고 이에 대한 연구가 활발히 진행되고 있다. D2D 통신을 위해 이용되는 링크를 사이드링크라 하며, 사이드링크는 낮은 PAPR (Peak to Average Power Ratio)을 위해 SC-FDMA (Single Carrier-Frequency Division Multiple Access)를 기반으로 한다. 또한, DMRS (DeModulation Reference Signal)를 사용함으로써 MIMO (Multiple Input Multiple Output) 전송이 가능하게 한다. 본 논문에서는 D2D 통신에서 사이드링크를 위한 DFT 기반 채널 추정 기법을 제안한다. 제안 기법은 빠른 속도로 움직이는 사용자의 채널 추정이 가능하도록 2-D MMSE (2-Dimensional Minimum Mean Square Error) 보간 기법을 사용한다. 시스템 레벨 시뮬레이션은 3GPP LTE-Advanced 시스템의 20MHz 대역을 기반으로 이루어 졌으며, 시뮬레이션 결과 제안한 채널 추정 기법을 통해 기존 기법보다 SINR(Signal-to-Interference-plus-Noise Ratio), 전송률 및 스펙트럼 효율 측면에서 성능 향상을 가져다주는 것을 확인하였다.

다우비시 웨이브릿 변환의 상세계수 비율을 이용한 교류발전기의 내부고장 검출 및 고장종류 판별 (Internal Fault Detection and Fault Type Discrimination for AC Generator Using Detail Coefficient Ratio of Daubechies Wavelet Transform)

  • 박철원;신광철;신명철
    • 전기학회논문지P
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    • 제58권2호
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    • pp.136-141
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    • 2009
  • An AC generator is an important components in producing a electric power and so it requires highly reliable protection relays to minimize the possibility of demage occurring under fault conditions. Conventionally, a DFT based RDR has been used for protecting the generator stator winding. However, when DFTs based on Fourier analysis are used, it has been pointed out that defects can occur during the process of transforming a time domain signal into a frequency domain one which can lead to loss of time domain information. This paper proposes the internal fault detection and fault type discrimination for the stator winding by applying the detailed coefficients by Daubechies Wavelet Transform to overcome the defects in the DFT process. For the case studies reported in the paper, a model system was established for the simulations utilizing the ATP, and this verified the effectiveness of the proposed technique through various off-line tests carried out on the collected data. The propose method is shown to be able to rapidly identify internal fault and did not operate a miss-operation for all the external fault tested.

Study on Advanced Frequency Estimation Technique using Gain Compensation

  • Park, Chul-Won;Shin, Dong-Kwang;Kim, Chul-Hwan;Kim, Hak-Man;Kim, Yoon-Sang
    • Journal of Electrical Engineering and Technology
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    • 제6권4호
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    • pp.439-446
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    • 2011
  • Frequency is an important operating parameter for the protection, control, and stability of a power system. Thus, it must be maintained very close to its nominal frequency. Due to the sudden change in generation and loads or faults in a power system, however, frequency deviates from its nominal value. An accurate monitoring of the power frequency is essential for optimum operation and prevention of wide area blackout. Most conventional frequency estimation schemes are based on the DFT filter. In these schemes, the gain error could cause defects when the frequency deviates from the nominal value. We present an advanced frequency estimation technique using gain compensation to enhance the DFT filter-based technique. The proposed technique can reduce the gain error caused when the frequency deviates from the nominal value. Simulation studies are performed using both the data from EMTP-RV software and the user-defined arbitrary signals to demonstrate the effectiveness of the proposed algorithm. Results show that the proposed algorithm achieves good performance under both steady state tests and dynamic conditions.

전기화재 방지를 위한 아크고장 판단기법에 대한 연구 (The Arc Fault Determination Method for the Electric Fire Prevention)

  • 고윤석
    • 한국전자통신학회논문지
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    • 제3권4호
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    • pp.260-265
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    • 2008
  • 수용가 시스템에서 발생하는 아크고장은 전기화재의 직접적인 원인이 되지만 기존의 고장검출 메커니즘으로는 확인이 어렵다. 따라서 본 연구에서는 전기화재의 주 원인이 되고 있는 아크고장의 원인을 분석하고 아크고장 기본 검출 메커니즘을 설계하였다. 또한 아크고장 판단의 정확도를 제고시킴으로써 오동작을 최소화할 수 있는 신호처리 기반의 아크고장 판단 방법론을 제안하였다. 끝으로, 하나의 돌입전류에 대해 이산 프리에 변환(DFT)과 이산 웨이블릿 변환(DWT)을 적용, 그 특성을 분석함으로써 신호척리 기반 고장판단 기법의 적용 방법론을 보였다.

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