An FPGA implementation of phasor measurement algorithm for single-tone signal

단일 톤 신호의 페이저 측정기법 및 FPGA구현

This paper presents an implementation method of phasor measurement device, which is based on the FPGA implementation of the sliding-DFT The design is verified by the timing simulation of its operation. The error effect of coefficient approximation and frequency deviation in the recursive implementation of the sliding-DFT is analytically derived and verified with the computer simulations.