• IEIE Transactions on Smart Processing and Computing
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• 제5권6호
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• pp.454-461
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• 2016

A maximum power point tracking (MPPT) system with fast-tracked time and high power efficiency is presented in this paper. The proposed MPPT system uses an unbounded binary search (UBS) algorithm that continuously tracks the maximum power point (MPP) with a binary system to follow the MPP under rapid-weather-change conditions. The proposed algorithm can decide the correct direction of the MPPT system while comparing the previous power point with the present power point. And then, by fixing the MPP until finding the next MPP, there is no oscillation of voltage MPP, which maximizes the overall power efficiency of the photovoltaic module. With these advantages, this proposed UBS is able to detect the MPP more effectively. This MPPT system is based on a boost converter with a micro-control unit to control analog-to-digital converters and pulse width modulation. Analysis of this work and experimental results show that the proposed UBS MPPT provides fast, accurate tracking with no oscillation in situations where weather rapidly changes and shadow is caused by all sorts of things. The tracking time is reduced by 87.3% and 66.1% under dynamic-state and steady-state operation, respectively, as compared with the conventional 7-bit perturb and observe technique.

• 전기학회논문지P
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• 제58권2호
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• pp.116-121
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• 2009

Distributed power systems (DPSs) has been widely used various industrial/military applications due to their various advantages. Furthermore, the "All electric" concept, in conjunction with DC DPS, appears to be more advanced and mature in the AEV(All-Electric Vehicular) industry. Generally, AEV carry many loads with varied functions. However, there may be large pulsed loads with short duty ratios which can affect the normal operation of other loads. In this paper, a converter with spilt capacitors and a simple adaptive controller is proposed as a active damping device to mitigate the voltage transients on the bus. The proposed converter allows the smaller capacitive storage. In addition, the proposed control approach has the advantage of requiring only one sensor and performing both the functions of mitigating the voltage bus transients and maintaining the level of energy stored. The control algorithm has been implemented on a TMS320F2812 Digital Signal Processor (DSP). Simulation and experimental results are presented which verify the proposed control principle and demonstrate the practicality of the circuit topology.

• Journal of Power Electronics
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• 제16권2호
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• pp.464-472
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• 2016

This study applies the selective harmonic elimination (SHE) technique to design and operate a regulated AC/DC/AC power supply suitable for maritime military applications and underground trains. The input is a single 50/60 Hz AC voltage, and the output is a 400 Hz regulated voltage. The switching angles for a multi-level inverter and transformer turns ratio are determined to operate with special connected transformers with equal power ratings and produce an almost sinusoidal current. As a result of its capability of directly controlling harmonics, the SHE technique is applicable to apparatus with congenital immunity to specific harmonics, such as series-connected transformers, which are specially designed to equally share the total load power. In the present work, a single-phase 50/60 Hz input source is rectified via a semi-controlled bridge rectifier to control DC voltage levels and thereby regulate the output load voltage at a constant level. The DC-rectified voltage then supplies six single-phase quazi-square H-bridge inverters, each of which supplies the primary of a single-phase transformer. The secondaries of the six transformers are connected in series. Through off-line calculation, the switching angles of the six inverters and the turns ratios of the six transformers are designed to ensure equal power distribution for the transformers. The SHE technique is also employed to eliminate the higher-order harmonics of the output voltage. A digital implementation is carried out to determine the switching angles. Theoretical results are demonstrated, and a scaled-down experimental 600 VA prototype is built to verify the validity of the proposed system.

• 한국정보통신학회논문지
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• 제20권6호
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• pp.1154-1162
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• 2016

본 논문에서는 이진 가중치 전류 기법을 이용한 고속 디지털 LDO(Low Dropout) 레귤레이터를 제안했다. 기존의 디지털 LDO는 일정량의 전류를 한 단계씩 제어하기 때문에 응답하는데 오랜 시간이 걸리며, 링잉 문제가 발생하게 된다. 이중 가중치 전류 기법은 링잉 문제를 제거함으로써 출력전압이 빠르게 안정화되도록 한다. 출력전압이 목표 전압에 안정적으로 도달하면, 디지털 LDO의 동작을 멈추는 프리즈 모드를 추가했다. 제안된 고속 응답 디지털 LDO는 출력 전원 전압이 급격히 바뀌는 시스템에서 응답속도가 느린 DC-DC 변환기와 함께 사용되어 출력전압을 빠르게 변하도록 한다. 제안된 디지털 LDO는 기존의 양방향 시프트 레지스터보다 면적이 56% 감소했고, 리플전압이 87% 감소했다. 제안된 디지털 컨트롤러는 $0.18{\mu}F$ CMOS 공정으로 제작되었다. $1{\mu}F$의 출력 캐패시터에서 정착시간이 $3.1{\mu}F$이고, 리플전압은 6.2mV 였다.

• Journal of Power Electronics
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• 제12권5호
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• pp.821-829
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• 2012

This research article presents a novel approach based on an instantaneous active and reactive power component (p-q) theory for generating reference currents for shunt active filter (SHAF). Three-phase reference current waveforms generated by proposed scheme are tracked by the three-phase voltage source converter in a hysteresis band control scheme. The performance of the SHAF using the p-q control strategy has been evaluated under various source conditions. The performance of the proposed control strategy has been evaluated in terms of harmonic mitigation and DC link voltage regulation. In order to maintain DC link voltage constant and to generate the compensating reference currents, we have developed Fuzzy logic controller with different (Trapezoidal, Triangular and Gaussian) fuzzy M.F.s. The proposed SHAF with different fuzzy M.F.s is able to eliminate the uncertainty in the system and SHAF gains outstanding compensation abilities. The detailed simulation results using MATLAB/SIMULINK software are presented to support the feasibility of proposed control strategy. To validate the proposed approach, the system is also implemented on a real time digital simulator and adequate results are reported for its verifications.

• Journal of Power Electronics
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• 제19권6호
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• pp.1449-1457
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• 2019

This paper presents two voltage domain stacking topologies for powering integrated digital loads such as multiprocessors or 3D integrated circuits. Pairs of loads and capacitors are connected in series to form a stack of voltage domains. The voltage is balanced by switching the position of the capacitors in one case and the position of the loads in the other case. This method makes the voltage regulation robust to large differential load power consumption. The first configuration can be named the load stacking topology. The second configuration can be named the capacitor stacking topology. This paper aims at proposing and comparing these two topologies. Models of both topologies and a switching scheme are presented. The behavior, control scheme, losses and overall performance are analyzed and compared theoretically in simulation and experiments. Experimental results show that the capacitor stacking topology has better performance with a 30% voltage ripple reduction.

• 한국태양에너지학회:학술대회논문집
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• 한국태양에너지학회 2012년도 춘계학술발표대회 논문집
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• pp.153-159
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• 2012

In photovoltaic system, the characteristic of photovoltaic module such as open circuit voltage and short circuit current will be changed because of cell temperature and solar radiation. Therefore, a boost converter of the PV system connects between the output of photovoltaic system and DC link capacitor of grid connected inverter as controlling duty ratio for maximum power point tracking(MPPT). This paper shows the dynamic characteristic of the boost converter by comparing single-loop control algorithm and two-loop control algorithm using both analog and digital control. The proposed both compensation method has been verified with computer simulation and simulation results obtained demonstrate the validity of the proposed control schemes.

• Journal of Power Electronics
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• 제14권3호
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• pp.444-457
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• 2014

This paper presents the design and realization of a digital PV simulator with a Push-Pull Forward (PPF) circuit based on the principle of modular hardware and configurable software. A PPF circuit is chosen as the main circuit to restrain the magnetic biasing of the core for a DC-DC converter and to reduce the spike of the turn-off voltage across every switch. Control and I/O interface based on a personal computer (PC) and multifunction data acquisition card, can conveniently achieve the data acquisition and configuration of the control algorithm and interface due to the abundant software resources of computers. In addition, the control program developed in Matlab/Simulink can conveniently construct and adjust both the models and parameters. It can also run in real-time under the external mode of Simulink by loading the modules of the Real-Time Windows Target. The mathematic models of the Push-Pull Forward circuit and the digital PV simulator are established in this paper by the state-space averaging method. The pole-zero cancellation technique is employed and then its controller parameters are systematically designed based on the performance analysis of the root loci of the closed current loop with $k_i$ and $R_L$ as variables. A fuzzy PI controller based on the Takagi-Sugeno fuzzy model is applied to regulate the controller parameters self-adaptively according to the change of $R_L$ and the operating point of the PV simulator to match the controller parameters with $R_L$. The stationary and dynamic performances of the PV simulator are tested by experiments, and the experimental results show that the PV simulator has the merits of a wide effective working range, high steady-state accuracy and good dynamic performances.

• 전기전자학회논문지
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• 제14권3호
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• pp.190-198
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• 2010

피에조소자를 구동하여 자동카메라의 초점을 자동으로 제어하는 시스템에서 피에조를 구동하는 집적회로를 설계하였다. 가공된 피에조에 변위를 만들기 위해서는 고전압 DC가 필요하다. 휴대형기기에서 사용하는 3[V]~4.2[V]정도의 낮은 전원전압을 약 80[V]로 승압하여 피에조 구동전압으로 제공하는 한편 입력되는 1[Vp-p]의 제어신호를 -20[V]에서 +80[V]까지 조절되도록 설계하였다. 또한 IC 외부에 적용되는 소자가 최소가 되도록 하여 시스템의 전체 크기를 줄일 수 있도록 하였다. 제어용 프로세서로 IIC(Inter-IC) 인터페이스를 적용하기 위하여 구동회로 내부에 IIC 인터페이스 디지털 로직을 내장하였는데, 이는 제품의 검증, 양산시 양품판정을 쉽게 해주는 장점이 있다. 제작공정은 AMIS 사의 I2T100 2P_3M 공정을 사용하였는데 0.6[um], 100[V]급 BCD공정이며, 6INCH 웨이퍼를 사용하였다. 전원전압 3.6[V], 소비전력은 약 40[mW]정도이다. 칩 사이즈는 1600*1500 [$um^2$]이며, 칩을 소형패키지에 내장하여 조립하였기 때문에 휴대형기기에 적용이 편리하게 되어있다.

• 전자공학회논문지SC
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• 제40권1호
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• pp.19-29
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• 2003

본 논문에서는 기존의 방법과는 달리 4 단계의 보정 기법을 적용하여 미세한 적외선 (infrared : IR) 신호를 검출해내는 비냉각 적외선 센서 어레이를 위한 CMOS 신호 검출회로를 제안한다. 제안하는 신호 검출회로는 11 비트의 A/D 변환기 (analog-to digital converter : ADC)와 7 비트의 D/A 변환기(digital to-analog converter : DAC), 그리고 자동 이득 조절 회로 (automatic gain control circuit : AGC)로 구성되며, 비냉각 센서 어레이를 동작시키는 DC 바이어스 전류 성분, 화소간의 특성 차이에 의한 변화 성분과 자체 발열 (self-heating)에 의한 변화 성분을 포함하는 적외선 센서 어레이의 출력 신호로부터 미세한 적외선 신호 성분만을 선택적으로 얻어낸다. 제안하는 A/D 변환기에서는 병합 캐패시터 스위칭(merged-capacitor switching : MCS) 기법을 적용하여 면적 및 전력 소모를 최소화하였으며, D/A 변환기에서는 출력단에 높은 선형성을 가지는 전류 반복기를 사용하여 화소간의 특성 차이에 의한 변화 성분과 자체 발열에 의한 변화 성분을 보정할 수 있도록 하였다. 시제품으로 제작된 신호 검출회로는 1.2 um double-poly double-metal CMOS 공정을 사용하였으며, 4.5 V 전원전압에서 110 ㎽의 전력을 소모한다. 제작된 시제품으로부터 측정된 검출회로의 differential nonlinearity (DNL)와 integral nonlinearity (INL)는 A/D 변환기의 경우 11 비트의 해상도에서 ±0.9 LSB와 ±1.8 LSB이며, D/A 변환기의 경우 7비트의 해상도에서 ±0.1 LSB와 ±0.1 LSB이다.