• Title/Summary/Keyword: DC transmission

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Consideration on the Effect of Setpoint AGC Command and Related AGC Logic in DCS (설정점 제어방식의 AGC 지령 및 발전소 DCS의 관련로직 변경방안)

  • Jeon, Dong-Hoon;Kwon, Soon-Man;Lee, Hyo-Sang;Shin, Joong-Seon
    • Proceedings of the KIEE Conference
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    • 2001.07a
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    • pp.395-397
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    • 2001
  • A new automatic generation control (AGC) signal transmission format will be adopted in the new energy management system (EMS) that KEPCO is planning to install for managing and operating the power system efficiently under the deregulation environment. Therefore, it is necessary for the power plants to make the AGC processing logic fit the new AGC signal flow format. In this work, we compare the new signal transmission scheme with the conventional one in view of its effect to the signal flow in the distributed control systems (DCS) that ale equipped in power plants to handle AGC operation. Then we propose a basic logic configuration for DCS that can be used with the new signal format. In the design of the configuration, some practical issues that should be discussed for the proper operation of the plants are considered.

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A Design of Microwave Measurement Board for Multi-channel Coaxial Cable Assembly (다중 채널 동축 케이블의 초고주파 측정용 보드 설계)

  • Moon, Soo-Deok;Kim, Jin-Kyu;Hwang, Hee-Yong
    • Journal of Industrial Technology
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    • v.27 no.A
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    • pp.169-175
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    • 2007
  • In High-Speed DSP systems, crosstalk between transmission lines of multi-channel can degrade the performance of equipment operations. This paper presents a microwave board to measure multi-channel coaxial cable assembly. The designed board has good performances from DC to 3 GHz, which have improved characteristic impedance, reduced crosstalk by using via fence, and low transmission loss. Using the designed board, we can measure characteristics of DUT(Device Under Test) such as return loss, insertion loss, crosstalk phase delay, and characteristic impedance. The measured results are used to improve performances of a produced coaxial cable assembly.

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A Distance Relaying Algorithm Based on the Integral Approximation of a Differential Equation (적분근사를 이용한 거리 계전 알고리즘)

  • Jung, B.T.;Seo, J.C.;Cho, K.R.;Park, J.K.
    • Proceedings of the KIEE Conference
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    • 1993.07a
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    • pp.180-182
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    • 1993
  • A distance protection algorithm for detecting faults at power transmission lines is presented in this paper. The algorithm is based on the differential equation related to the voltage and the current at an equivalent circuit of a transmission line which is composed of the lumped resistance and inductance. The presented integration method has high performance at though the fault voltage and the current are heavily distorted with the DC offset and harmonics which occurred at transient states after faults.

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Control of a VSC-HVDC Transmission System based on Modular Multilevel Converters (모듈형 멀티레벨 컨버터로 구성된 고압직류 송전시스템의 제어)

  • Cui, Shenghui;Sul, Seung-Ki
    • Proceedings of the KIPE Conference
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    • 2014.07a
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    • pp.341-342
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    • 2014
  • VSC-HVDC system based on Modular Multilevel Converter (MMC) is an emerging technology since compared to the conventional VSC-HVDC system an MMC presents several advantages such as modularity, low dv/dt, low harmonics, and low switching losses. In this paper, a comprehensive control strategy of an MMC-based VSC-HVDC system is proposed. In contrast to the conventional system control strategy, the DC side of the MMC operates as a controlled voltage source by the proposed method, and the dynamics of the transmission line voltage and current can be actively controlled. Validity of the proposed strategy was verified by 201-level full-scale computer simulation.

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Issues in Building Large RSFQ Circuits (대형 RSFQ 회로의 구성)

  • Kang, J.H.
    • Progress in Superconductivity
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    • v.3 no.1
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    • pp.17-22
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    • 2001
  • Practical implementation of the SFQ technology in most application requires more than single-chip-level circuit complexity. Multiple chips have to be integrated with a technology that is reliable at cryogenic temperatures and supports an inter-chip data transmission speed of tens of GHz. In this work, we have studied two basic issues in building large RSFQ circuits. The first is the reliable inter-chip SFQ pulse transfer technique using Multi-Chip-Module (MCM) technology. By noting that the energy contained in an SFQ pulse is less than an attojoule, it is not very surprising that the direct transmission of a single SFQ pulse through MCM solder bump connectors can be difficult and an innovative technique is needed. The second is the recycling of the bias currents. Since RSFQ circuits are dc current biased the large RSFQ circuits need serial biasing to reduce the total amount of current input to the circuit.

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The efficient DC-link voltage design of the Type 4 wind turbine that satisfies HVRT function requirements (HVRT 기능 요구조건을 만족하는 Type 4 풍력 발전기의 효율적인 직류단 전압 설계)

  • Baek, Seung-Hyuk;Kim, Sungmin
    • Journal of IKEEE
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    • v.25 no.2
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    • pp.399-407
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    • 2021
  • This paper proposes the DC-link voltage design method of Type 4 wind turbine that minimizes power loss and satisfies the High Voltage Ride Through(HVRT) function requirements of the transmission system operator. The Type 4 wind turbine used for large-capacity offshore wind turbine consists of the Back-to-Back converter in which the converter linked to the power grid and the inverter linked to the wind turbine share the DC-link. When the grid high voltage fault occurs in the Type 4 wind turbine, if the DC-link voltage is insufficient compared to the fault voltage level, the current controller of the grid-side converter can't operate smoothly due to over modulation. Therefore, to satisfy the HVRT function, the DC-link voltage should be designed based on the voltage level of high voltage fault. However, steady-state switching losses increase further as the DC-link voltage increases. Therefore, the considerations should be included for the loss to be increased when the DC-link voltage is designed significantly. In this paper, the design method for the DC-link voltage considered the fault voltage level and the loss is explained, and the validity of the proposed design method is verified through the HVRT function simulation based on the PSCAD model of the 2MVA Type 4 wind turbine.

Series Line Compensation through Voltage Source Inverter (전압원 인버터에 의한 선로의 직렬보상)

  • 한병문;한경희;신익상;강중구
    • Proceedings of the KIPE Conference
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    • 1997.07a
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    • pp.299-302
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    • 1997
  • This paper describes a dynamic var compensator to compensate the line reactance for power transmission and distribution system. The compensator consists of a voltage source inverter with dc capacitor, coupling transformers, and control circuit. The operation of compensator was verified by computer simulations with EMPT and experimental works with a scaled hardware model. The advantage of the proposed system is rapid and continuous regulation of the reactive power.

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Development of 60MW HVDC System Control Algorithm (60MW급 HVDC 시스템 제어 알고리즘 개발)

  • Lee, Kyung-Bin;Chung, Yong-Ho;Hwang, Ho-Yoon
    • Proceedings of the KIPE Conference
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    • 2012.11a
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    • pp.183-184
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    • 2012
  • 2010년부터 민간기업인 LS산전과 한국전력공사의 공동 개발을 통하여 60MW급 ${\pm}80kV$ HVDC (High Voltage DC transmission System)전류형 HVDC시스템 알고리즘 국산화 개발을 진행하여 2012년 3월 개발을 완료하였다. 개발된 알고리즘의 성능, 안정성 및 신뢰성을 확보하기 위하여 LS산전에서 개발한 Hardware 플랫폼에 제어 알고리즘을 탑재하고 RTDS(Real Time Digital Simulator)를 통한 연계시험을 진행하여 이를 검증하였다. 본 논문에서는 개발된 HVDC 제어 알고리즘의 기능과 RTDS연계 시험결과를 소개하고자 한다.

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Control Hierarchy Analysis of Haenam-Cheju HVDC system (해남-제주 HVDC 계통의 제어 계층 구조 분석)

  • Kwak, Joo-Sik
    • Proceedings of the KIEE Conference
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    • 1999.07c
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    • pp.1327-1330
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    • 1999
  • In this paper control hierarchy of Haenam-Cheju HVDC link are analyzed and their functional specifications are summarized related to their level. The control functions for the submarine DC transmission are implemented by software programs on 16-bit parallel processor-based machines which are composed of subunits hierarchically linked each other

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Design of PID Controller using Immune Algorithm for AC-DC Power System (교류-직류시스템의 안정화를 위한 면역알고리즘을 이용한 최적 PID 제어기 설계)

  • 정현화;허동렬;이정필;정형환
    • Proceedings of the Korean Society of Marine Engineers Conference
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    • 2001.05a
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    • pp.225-230
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    • 2001
  • In this paper, a method for optimal design of PID controller using the immune algorithm(IA) has been proposed to improve the stability of A.C.-D.C. power system. The process of this study is composed of formulation of basic controls on HVDC transmission system, mathematical model preparation for stability analysis, and supplementary signal control by an optimal PID controller using the IA. The dynamic property was verified through computer simulations regarding transient stability.

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