• 정보처리학회지
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• 제11권6호
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• pp.8-24
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• 2004

OO RT programming is a technology expected to flourish in this quarter of the 21st century. Currently, its youthfulness is indicated by the insufficient availability of the support middleware and the associated API, let alone language compilers. The middleware providing fault-tolerant execution support is in its infancy. The advances in OO RT distributed programming will also enable large-scale RT simulations. The research community dealing with this technology area is expected to grow continuously for foreseeable future and consequent accelerations of the technology advances will in turn accelerate the development of many new types of sophisticated RT DC applications as well as realization of advanced types of ubiquitous computing societies.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 A
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• pp.379-381
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• 1999

This paper presents a study of the performance of a brushless DC motor (BLDCM) speed control system. Recently, most motor controls are implemented in digital electronics. Digital controllers tend to be more accurate, less susceptible to noise and more flexible in terms of programming. The system used a digital PI controller in order to implement the constant speed of Brushless DC motor. Microprocessor used in this experiment is 80c196kc. The applied motor has been constructed using a 50W, 150V, 3000rpm, four-pole motor.

• 한국전자통신학회논문지
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• 제8권8호
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• pp.1227-1234
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• 2013

1.2 더블 폴리 부유게이트 트랜지스터로 구성된 아날로그 메모리가 CMOS 표준공정에서 제작되었다. 효율적인 프로그래밍을 위해 일반적인 아날로그 메모리에서 사용되었던 불필요한 초기 소거 동작을 제거하였으며 프로그래밍과 읽기의 경로를 동일하게 가져감으로서 읽기 동작 시에 발생하는 증폭기의 DC 오프셋 문제를 근본적으로 제거하였다. 어레이의 구성에서 특정 셀을 주변의 다른 셀들로부터 격리시키는 패스 트랜지스터 대신에 Vmid라는 별도의 전압을 사용하였다. 실험 결과 아날로그 메모리가 디지털 메모리의 6비트에 해당하는 정밀도를 보였으며 프로그래밍 시에 선택되지 않은 주변의 셀들에 간섭 효과가 없는 것으로 확인되었다. 마지막으로, 아날로그 어레이를 구성하는 셀은 특이한 모양의 인젝터 구조를 가지고 있으며, 이것은 아날로그 메모리가 특별한 공정 없이도 트랜지스터의 breakdown 전압 아래에서 프로그래밍 되도록 하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권1호
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• pp.75-87
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• 2012

A design paradigm using sequential geometric programming is presented to accurately design CMOS op amps with BSIM3. It is based on new adaptive modeling of transistor parameters through the operating point simulation. This has low modeling cost as well as great simplicity and high accuracy. The short-channel dc, high-frequency small-signal, and short-channel noise models are used to characterize the physical behavior of submicron devices. For low-power and low-voltage design, this paradigm is extended to op amps operating in the subthreshold region. Since the biasing and modeling errors are less than 0.25%, the characteristics of the op amps well match simulation results. In addition, small dependency of design results on initial values indicates that a designed op amp may be close to the global optimum. Finally, the design paradigm is illustrated by optimizing CMOS op amps with accurate transfer function.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 정기총회 및 추계학술대회 논문집 학회본부
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• pp.53-55
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• 1993

This paper describes the development of a software that has the man expert knowledge, experience and inference. This software is helpful for selecting the motors and driving systems which are best fit for the applications. Developed software can automatically select the most reasonable motor driving systems, only if a semi-skilled engineer inputs the performance criteria for the applications and mechanical data. Expert system inference engine and knowledge-base are implemented by C programming language. Data-base was implemented from manufacturer's catalogues for DC motors and brushless DC motors. Efficiencies of the various motor driving systems are compared reference on the average efficiency depends on the operating profiles. Developed expert system was tested in various of applications to verify the reliability, quick and easy selecting of the motor driving systems.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 B
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• pp.583-585
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• 1999

This paper presents the controller of multiple DC motors using the network. This controller has been built with 16-bits one chip microprocessor (87C196CA) which includes the integrated CAN serial communication and position control for two motors. Since only one microprocessor is needed, the proposed controller is not only cost effective but also powerful. The system is composed of one main controller, trajectory planner, and the other sub controller, position controller. The main controller which has been built using Visual Basic programming on the Pentium PC, generates the trajectory and then transmits it to the sub controller. The trajectory transmitted from the PC will be processed by the sub controller. Two motors are controlled using the conventional position control, PID, to reach them the same target position but with different velocities at the same time. The communications between the main controller and sub controller is performed through the RS-232 or the CAN communication The CAN would be safer and faster than serial communication network since it has non-destructive bitwise arbitration specification. In this paper, we consider the CAN communications generally and then show the usefulness of the proposed controller by demonstrating position control of two DC motors.

• 응용통계연구
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• 제33권5호
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• pp.569-578
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• 2020

분위수 회귀모형은 반응변수의 조건부 분위수 함수를 추정함으로써 반응변수와 예측변수의 관계에 대한 포괄적인 정보를 제공한다. 특히 커널 분위수 회귀모형은 비선형 관계식을 고려하기 위하여 양정치 커널함수(kernel function)에 의해 만들어지는 재생 커널 힐버트 공간(reproducing kernel Hilbert space)에서 비선형 조건부 분위수 함수를 추정한다. 그러나 KQR은 이차계획법으로 공식화되어 많은 계산비용을 필요로 하므로 컴퓨터 메모리 능력의 제한으로 대용량 자료의 분석은 불가능하다. 이러한 문제점을 해결하기 위하여 본 논문에서는 분할정복(divide and conquer) 알고리즘을 활용한 KQR 추정법(DC-KQR)을 제안한다. DC-KQR은 먼저 전체 훈련자료를 몇 개의 부분집합으로 무작위로 분할(divide)한 후, 각각의 부분집합에 대하여 KQR 분위수 함수를 추정하고 이들의 산술 평균을 이용하여 최종적인 추정량으로 통합(conquer)하는 기법이다. 본 논문에서는 모의실험과 실제자료 분석을 통해 제안한 DC-KQR의 효율적인 성능과 활용 가능성을 확인하였다.

• 전자공학회논문지C
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• 제35C권10호
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• pp.30-37
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• 1998

1.2㎛ 더블 폴리 부유게이트 트랜지스터로 구성된 아날로그 메모리가 CMOS 표준공정에서 제작되었다. 효율적인 프로그래밍을 위해 일반적인 아날로그 메모리에서 사용되었던 불필요한 초기 소거 동작을 제거하였으며 프로그래밍과 읽기의 경로를 동일하게 가져감으로서 읽기 동작 시에 발생하는 증폭기의 DC offset 문제를 근본적으로 제거하였다. 어레이의 구성에서 특정 셀을 주변의 다른 셀들로부터 격리시키는 패스 트랜지스터 대신에 Vmid라는 별도의 전압을 사용하였다. 실험 결과 아날로그 메모리가 디지털 메모리의 6비트에 해당하는 정밀도를 보였으며 프로그래밍 시에 선택되지 않은 주변의 셀들에 간섭 효과가 없는 것으로 확인되었다. 마지막으로, 아날로그 어레이를 구성하는 셀은 특이한 모양의 인젝터 구조를 가지고 있으며, 이것은 아날로그 메모리가 특별한 공정 없이도 트랜지스터의 breakdown 전압 아래에서 프로그래밍 되도록 하였다.

• Journal of Electrical Engineering and Technology
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• 제12권5호
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• pp.1872-1882
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• 2017

Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.

• 한국컴퓨터정보학회논문지
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• 제21권1호
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• pp.59-64
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• 2016

This paper suggests heuristic algorithm with O(mn) polynomial time complexity using Excel for partially survivable networks optimization problem of cellular telecommunication systems with m cells and n hubs. This problem only can be get the solution using linear programming or LINGO software package. The proposed algorithm connects the cell to hubs in ring network with minimum cost as the connection diversity of each cell. If the traffic of ring network (T) is T>2K for ring capacity (K), we adjust the maximum cost hub to MTSO that has a ascending order of (D/DC)/${\Delta}^+$ cell with each cell traffic demand (D) and ${\Delta}^+$=(MTSO cost-maximum cost hub) than we get the $T{\leq}2K$. Finally, we adjust MTSO to the removed maximum cost hub for the cell with 2K-$T{\geq}$(D/DC) and $_{max}{\Delta}^-$. While we using like this simple method, the proposed algorithm can be get the same optimal solution for experimental data as linear programing and LINGO software package.