• 제목/요약/키워드: DC line fault

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Dynamic Analysis Algorithm of Irreversible Demagnetization of IPM-type Brushless DC Motor by Stator Turn Fault (고정자 절연파괴 고장에 의한 매입형 영구자석 BLDC 모터의 불가역 감자에 대한 동적해석 알고리즘)

  • Lee, Yoon-Seok;Kim, Kyung-Tae;Hur, Jin
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.12
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    • pp.1661-1667
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    • 2013
  • This paper studies the dynamic irreversible demagnetization characteristics of an interior permanent magnet (PM) brushless DC motor with a stator turn fault. A new algorithm, which is a finite element method (FEM) combined with a line voltage equation of the motor, is developed to analyze irreversible demagnetization under dynamic and transient states and considers a stator turn fault. The input current, circulating current, magnetic distribution characteristics, and operating property of the PM, including the irreversible demagnetization in the fault state, are analyzed using this algorithm by considering the magnetic saturation effect. The feasibility of the proposed method confirmed from the analysis results is verified via an experiment. Through this fault analysis, we can accurately check the fault phenomena of a PM motor against the demagnetization fault for fault prevention.

Short Circuit Tests of the Three-Phase DC Reactor Type Fault Current Limiter in Changing of Turns Ratio of Transformers (변압기 권선비의 변화에 따른 3상 DC 리액터형태 한류기의 단락실험)

  • Lee, Eung-Ro;Lee, Chan-Ju;Lee, Seung-Je;Go, Tae-Guk;Hyeon, Ok-Bae
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.51 no.6
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    • pp.267-272
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    • 2002
  • This Paper deals with the short circuit tests of the three-Phase DC reactor type fault current limiter (FCL) in changing of turns ratio of transformers. The experiment of this paper is a preliminary step to develop the FCL's faculties for an application to high voltage transmission line. So, superconducting coil was made of Nb-Ti, low temperature superconductor, and the ratings of the power system of experimental circuit are 400V/7A class. A three-phase DC reactor type FCL consists of three transformers, six diodes, one superconducting coil and one cryostat. The important point of experimental analysis is transient period, the operating lagging time of circuit breaker. As the results of the experiment, the values are referred to the limitation rate about 77% and 90% when the turns ratio of transformer was 1:1 and 2:1 respectively.

The Design of the DC traction Protection system and Device for the test line of Light Rail Transit (경전철 시험선로의 직류 보호시스템 및 보호계전기 설계)

  • Jeon, Y.J.;Kim, J.H.;Baek, B.S.;Kim, N.H.;Lee, B.S.;Ahn, J.H.
    • Proceedings of the KIEE Conference
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    • 2002.07b
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    • pp.1229-1231
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    • 2002
  • This paper presents the design of DC protection system of Light Rail Transit system. Especially, the composition and interface for DC Switchgear. Digital protection unit and sort of protection algorithm are focused. DC Switchgear (DCSWGR) for LRT testline consist of 5 different panels with peculiar characteristics are examined. Also Basic actuation principle for DC fault select relay (50F), Line Test Device (LTD), DC Overcurrent(OCR) relay are introduced.

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Simulation of the Three-phase DC Reactor Type Fault Current Limiter for the Short-circuit Test (삼상형 dc reactor형태 한류기의 단락회로실험을 위한 시뮬레이션)

  • Lee, Eung-Ro;Lee, Seung-Je;Lee, Chan-Joo;Ko, Tae-Kuk;Hyun, Ok-Bae
    • Proceedings of the KIEE Conference
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    • 2001.07b
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    • pp.717-719
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    • 2001
  • This paper deals with simulation of the three-phase dc reactor type fault current limiter(FCL). This is a preliminary step to develop the FCL's faculties for an application to high voltage transmission line. A three-phase dc reactor type FCL consists of transformers, diodes, and a superconducting coil. By this simulation for the short-circuit test we can investigate the safety of FCL's elements. And, result of simulation will contribute parameter toward optimal design.

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A Lecture Note on PU Method thru Calculation of a Simple DC Circuit and Voltage/Fault Analysis of Industrial Power Systems using Actual Data (PU법에 의한 DC 회로계산 및 실계통 데이터를 이용한 전압강하/고장계산 방법)

  • Lee, Sang-Joong
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.28 no.12
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    • pp.45-54
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    • 2014
  • This paper presents a lecture note of pu method for power system analysis. The author tries to help students in class better understand the fundamental of pu calculation using a very simple DC circuit. And a voltage drop calculation by pu method for a distribution system is given to help understand the importance of the vector reference in AC circuit analysis. A short current calculation by pu method for a power system with a generator, transformer and transmission line is also presented to show how pu calculation can be applied to real power systems, in which all the data are the ones currently being used by KEPCO and other industrial sites.

A DC-Offset Elimination Algorithm Based on an AR Model (AR모델을 이용한 직류 옵셋 성분 제거 알고리즘)

  • Chang Soo Young;Lee Dong Gyu;Kang Sang Hee
    • Proceedings of the KIEE Conference
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    • summer
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    • pp.289-291
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    • 2004
  • ln this paper, A dc-offset elimination novel algorithm based on an An model is proposed. The algorithm can eliminate dc-offset rapidly than other algorithms. The signal of fault current can be presented as a linear equation combined sinusoidal with exponential signals. Then, the linear equation can be presented an auto-regressive(AR) model and do-offset can be calculated by the equation of AR model. So it is possible to be removed the dc-offset from the original current signal. Performance evaluation of the algorithm was tested on condition that A-phase ground fault on 154kV 25km overhead transmission line.

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Distance Relaying Algorithm Using a DFT-based Modified Phasor Estimation Method (DFT 기반의 개선된 페이저 연산 기법을 적용한 거리계전 알고리즘)

  • Lee, Dong-Gyu;Kang, Sang-Hee
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.8
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    • pp.1360-1365
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    • 2010
  • In this paper, we propose a distance relaying algorithm using a Discrete Fourier Transform (DFT)-based modified phasor estimation method to eliminate the adverse influence of exponentially decaying DC offsets. Most distance relays are based on estimating phasors of the voltage and current signals. A DFT is generally used to calculate the phasor of the fundamental frequency component in digital protective relays. However, the output of the DFT contains an error due to exponentially decaying DC offsets. For this reason, distance relays have a tendency to over-reach or under-reach in the presence of DC offset components in a fault current. Therefore, the decaying DC components should be taken into consideration when calculating the phasor of the fundamental frequency component of a relaying signal. The error due to DC offsets in a DFT is calculated and eliminated using the outputs of an even-sample-set DFT and an odd-sample-set DFT, so that the phasor of the fundamental component can be accurately estimated. The performance of the proposed algorithm is evaluated for a-phase to ground faults on a 345 kV, 50 km, simple overhead transmission line. The Electromagnetic Transient Program (EMTP) is used to generate fault signals. The evaluation results indicate that adopting the proposed algorithm in distance relays can effectively suppress the adverse influence of DC offsets.

A DFT Based Filtering Technique to Eliminate Decaying dc and Harmonics for Power System Phasor Estimation

  • Oh Yong- Taek;Balamourougan V.;Sidhu T.S.
    • KIEE International Transactions on Power Engineering
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    • v.5A no.2
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    • pp.138-143
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    • 2005
  • During faults, the voltage and current signals available to the relay are affected by the decaying dc component and harmonics. In order to make appropriate and accurate decisions, most of the relaying algorithms require the fundamental frequency phasor information that is immune to decaying dc effect and harmonics. The conventional Fourier ph as or estimation algorithm is affected by the presence of decaying-exponential transients in the fault signal. This paper presents a modified Fourier algorithm, which effectively eliminates the decaying dc component and the harmonics present in the fault signal. The decaying dc parameters are estimated by means of an out-of-band filtering technique. The decaying dc offset and harmonics are removed by means of a simple computational procedure that involves the design of two sets of Orthogonal digital OFT filters tuned at different frequencies and by creating three off-line look-up tables. The technique was tested for different decay rates of the decaying dc component. It was also compared with the conventional mimic plus the full cycle OFT algorithm. The results indicate that the proposed technique has a faster convergence to the desired value compared to the conventional mimic plus OFT algorithms over a wide range of decay rates. In all cases, the convergence to the desired value was achieved within one cycle of the power system frequency.

A Fault Location Algorithm for a Transmission Line Using Travelling Waves (진행파를 이용한 송전선로의 고장점 표정 알고리즘)

  • Kang Sang-Hee;Kim Jin-Han
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.53 no.10
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    • pp.542-549
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    • 2004
  • The conventional fault location algorithms based on the travelling waves have an inherent problem. In cases of the close-up faults occurring near the relaying point and of the faults having zero degree inception angle of voltage signals, the conventional algorithms can not estimate an accurate fault distance. It is because the shapes of travelling waves are near sinusoidal in those cases. A new method solving this problem is presented in this paper. An FIR(Finite Impulse response) filter which makes high frequency components prominent and makes the power frequency component and dc-offset attenuated is used. With this method, the cross-correlation peak is to be very clear when a close-up fault or a fault having near zero-degree inception angle occurs. The cross-correlation peaks can be clearly distinguished and accurate fault location is practically possible consequently. A series of simulation studies using EMTP(Electromagnetic Transients Program) show that the proposed algorithm can calculate an accurate fault distance having maximum 2% or less error.

DC Fault Study in Point-to-Point HVDC Grid based on MMC VSC (MMC VSC 기반 Point-to-Point HVDC Grid에서의 DC 고장 분석)

  • Lee, Dong-Su;Kim, Ki-Suk;Jang, Gil-soo
    • Proceedings of the KIEE Conference
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    • 2015.07a
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    • pp.161-162
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    • 2015
  • 최근 세계적으로 전력계통의 대륙 간 연계나 신재생에너지, 분산전원의 계통 연계를 위해 HVDC(High voltage Direct Current)에 대한 연구가 활발히 진행되고 있다. 대용량, 장거리 송전이 필요한 경우 HVAC에서의 전력손실과 송전거리의 한계를 극복하기 위하여 HVDC가 새로운 대안으로 떠오르고 있으며, LCC(Line commutated Converter)와 VSC(Voltage Source Converter)의 기술발전이 비약적으로 이뤄지고 있다. 특히, DC Grid화를 위해서 유럽에서는 해상풍력을 연계한 Windfarm을 DC Grid화 하는 프로젝트가 활발히 진행되고 있다. 이러한 신재생 에너지의 계통 연계를 위해서 DC Grid가 본격적으로 논의가 되고 있고 관련분야에서는 기술개발을 앞다퉈 진행하고 있는 상황이다. DC Grid 구현을 위해 VSC HVDC가 최근 주목받고 있으며, VSC로 연계된 DC Grid의 AC 계통과의 연계를 위해 가장 필요한 것이 바로 DC 차단기라고 할 수 있겠다. 본 논문에서는 DC Grid의 고장분석을 위한 기초연구로써 MMC(Modular Multilevel Converter) VSC를 기반으로 한 Point-to-Point HVDC Grid에서의 DC 고장에 대한 분석을 실시하였으며 그 특징을 분석하였다.

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