• Korean Journal of Materials Research
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• v.14 no.3
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• pp.203-210
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• 2004

Effects of various pretreatments on the adhesion of copper-coated polymer films were investigated. Copper-coated polymer films were prepared by an electron cyclotron resonance-metal organic chemical vapor deposition (ECR-MOCVD) coupled with a DC bias system at room temperature. PET(polyethylene terephthalate) film was employed as a substrate material and it was pretreated by industrially feasible methods such as chromic acid, sand-blasting, oxygen plasma and ion-implantation treatment. Surface characterization of the copper-coated polymer film was carried out by AFM(Atomic Force Microscopy) and FESEM(Field Emission Scanning Electron Microscopy). Surface energy was calculated by based on the value of the contact angle measured. The adhesion of copper/PET films was determined by a pull-off test according to ASTM D-5179. It was found that suitable pretreatment of the PET substrate was required for obtaining good adhesion property between copper films and the substrate. In this study the highest adhesion was observed in sand-blasting, and then followed by those of acid and oxygen plasma treatment. However, the effect of surface energy was insignificant in our experimental range. This is probably due to compensating the difference in surface energy from various pretreatments by exposing substrate to ECR plasma for 5 min or longer at the early stage of the copper deposition. Therefore, it can be concluded that surface roughness of the polymer substrate plays an important role to determine the adhesion of copper-coated polymer for the deposition of copper by ECR-MOCVD.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.278-279
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• 2012

최근 들어 세계적인 고유가 행진과 화석연료 고갈에 대응하기 위하여 대체 에너지원 발굴에 대한 필요성이 높아지고 있다. 그 중 CIGS 박막 태양전지는 미래 신재생 에너지 자원의 가장 유망한 후보군 중 하나이다. 기존의 Si 기반의 태양전지의 경우 시간경과에 따른 효율 저하, 높은 재료비, 복잡한 공정으로 인하여 대량생산이 힘든 단점을 가지고 있다. 반면 박막 태양전지의 경우 생산 원가를 낮출 수 있는 태양전지 제조기술로서는 2세대 태양전지로 불리우며, 에너지 변환 효율과 생산 원가에서 우월성을 가진다. 그리고 이러한 CIGS 박막 태양전지를 단일 CIGS 타겟을 이용하여 스퍼터링 공정으로 제작하면 기존에 사용되었던 동시 증발법에 비해서 간단하고 대면적 코팅 및 대량 생산이 가능하다. 본 연구에서 사용된 기판으로는 $25{\times}25mm$ 크기의 Soda Lime Glass (SLG) 위에 DC 마그네트론 스퍼터링 공정으로 Mo가 $1{\mu}m$ 증착된 시편을 이용하여, 2 inch 단일 CIGS 타겟 (MATERION, CIGS Target 25-17.5-7.5-50 at%)을 기판 가열하여 증착하였다. RF 파워는 80 W, 기판 온도는 RT, 100, 200, 300, $400^{\circ}C$로 가열 후 증착하였고, CIGS 박막의 두께는 약 $1{\mu}m$로 일정하게 하였다. CIGS/Mo 박막의 파워별 미세구조 분석을 위해 X-ray Diffraction (XRD, BRUKER GADDS)로 측정하였으며, 박막의 결정립 크기를 확인하기 위해 Field Emission Scanning Electron Microscopy (FE-SEM, HITACHI)을 사용하여 측정하였다. 조건별 박막의 조성 분석 및 표면조도는 Energy Dispersive X-ray Spectroscopy (EDS, HORIBA 7395-H)와 Atomic Force Microscopy (AFM)을 이용하여 각각 평가하였다. 마지막으로 광학적 특성을 평가하고 박막의 밴드갭 에너지를 계산하기 위해서 190 nm에서 1,100 nm의 영역 대에서 자외선 광학 측정기(UV-Vis, HP-8453, AGLIENT)로 투과도를 측정하여 밴드갭 에너지를 계산하였다. 증착된 CIGS 박막은 기판 온도가 증가함에 따라 결정립 크기가 커지는 경향을 보였다. 이는 기판 상에 도달한 스퍼터 원자의 확산 에너지 증가로 인한 것으로 생각되어진다. 또한, 기판온도에 따른 결정립 성장 변화는 4성분계의 박막의 조성 및 핵생성 밀도와 관련되어 설명되어질 것이다.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.86.2-86.2
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• 2015

Cu2ZnSn(S,Se)4 thin film solar cells have been fabricated using sputtered Cu/Sn/Zn metallic precursors on Mo coated sodalime glass substrate without using a toxic H2Se and H2S atmosphere. Cu/Sn/Zn metallic precursors with various thicknesses were prepared using DC magnetron sputtering process at room temperature. As-deposited metallic precursors were sulfo-selenized inside a graphite box containing S and Se pellets using rapid thermal processing furnace at various sulfur to selenium (S/Se) compositional ratio. Thin film solar cells were fabricated after sulfo-selenization process using a 65 nm CdS buffer, a 40 nm intrinsic ZnO, a 400 nm Al doped ZnO, and Al/Ni top metal contact. Effects of sulfur to selenium (S/Se) compositional ratio on the microstructure, crystallinity, electrical properties, and cell efficiencies have been studied using X-ray diffraction, Raman spectroscopy, field emission scanning electron microscope, I-V measurement system, solar simulator, quantum efficiency measurement system, and time resolved photoluminescence spectrometer. Our fabricated Cu2ZnSn(S,Se)4 thin film solar cell shows the best conversion efficiency of 9.24 % (Voc : 454.6 mV, Jsc : 32.14 mA/cm2, FF : 63.29 %, and active area : 0.433 cm2), which is the highest efficiency among Cu2ZnSn(S,Se)4 thin film solar cells prepared using sputter deposited metallic precursors and without using a toxic H2Se gas. Details about other experimental results will be discussed during the presentation.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.8
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• pp.392-398
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• 2006

The properties of tunable dielectric materials on RF frequency band are important high tunability and low loss for RF variable devices, variable capacitor, phased array antenna and other components application. Various composite of BST(barium strontium titanate) ratio combined with other non-electrical active oxide ceramics have been formulated for such uses. We present the tunable properties and Curie temperature on BST thick films. The grain growth of the weight ratio of $BaTiO_3$ increased. This can be explained by the substitute $Sr^{2+}$ ion for $Ba^{2+}$ ion in the $BaTiO_3$ system. The Curie temperature was shifted to lower temperature with increasing $SrTiO_3$in the $BaTiO_3-SrTiO_3$ system, because of decreasing the lattice constant. Also, the dielectric constant, tunability and K-factor of $(Ba_xSr_{1-x})TiO_3$ at over the Curie temperature decreased, at over the $60^{\circ}C$ fixation, maximum dielectric constant at Curie temperature and hence sharper phase transformation occurred at Curie temperature. The result were interpreted as a process of internal stress relaxation resulting form the increase of $90^{\circ}$ domains induced the BST. As a result, It is concluded that over the Curie temperature, frequency response and DC field effect for the tunable properties of BST thick film are suppressed by the transition broadening. For the application of tunable devices, that the curie temperature was investigated to be increased.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.10
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• pp.67-75
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• 2013

In this paper, an analytical model is presented for the source/drain parasitic resistance of FinFET. The parasitic resistance is a important part of a total resistance in FinFET because of current flow through the narrow fin. The model incorporates the contribution of contact and spreading resistances considering three-dimensional current flow. The contact resistance is modeled taking into account the current flow and parallel connection of dividing parts. The spreading resistance is modeled by difference between wide and narrow and using integral. We show excellent agreement between our model and simulation which is conducted by Raphael, 3D numerical field solver. It is possible to improve the accuracy of compact model such as BSIM-CMG using the proposed model.

• Journal of Sensor Science and Technology
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• v.8 no.1
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• pp.53-62
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• 1999

Micro polysilicon actuators, which are widely used in the field of MEMS (Microelectromechanical System) technology, were fabricated using polysilicon thin layers. Polysilicon deposition were carried out to have symmetrical layer structures with a LPCVD (Low Pressure Chemical Vapor Deposition) system, and we have measured physical characteristics by micro test patterns, such as bridges and cantilevers to verify minimal mechanical stress and stress gradient in the polysilicon layers according to the methods of mutilayer deposition, doping, and thermal treatment, also, analyzed the properties of each specimen, which have a different process condition, by XRD, and SIMS etc.. Finally, the fabricated planar polysilicon resonator, symmetrically stacked to $6.5{\mu}m$ thickness, showed Q of 1270 and oscillation ampitude of $5{\mu}m$ under DC 15V, AC 0.05V, and 1000 mtorr pressure. The developed micro polysilicon resonator can be utilized to micro gyroscope and accelerometer sensor.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.11
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• pp.869-874
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• 2010

Magnetoelectric composites with compositions (1-x)[0.5PZT-0.25PNN-0.25PZN](ferroelectric) - x[$(Ni_{0.9}Zn_{0.1})Fe_2O_4$](ferrite) in which x varies as 0, 0.1, 0.2, 0.4, 0.6, 0.8, 1.0 were prepared by conventional ceramic process. The presence of two phases (ferroelectric phase with large grain and ferrite phase with small grain) in the particulate ceramic composites was confirmed by XRD, SEM and EDX. The ferroelectric and magnetic properties of the composites were studied by measuring the P-E and M-H hysterisis loop on the composite composition (x=0, 0.1, 0.2, 1), they were strongly affects of the phase content in composite. The magnetoelectric votage was measured as a function of DC magnetic field and the maximum magnetoelectric voltage coefficient of 14 mV/cm Oe was observed in x=0.2(80 mol% ferroelectric and 20 mol% ferrite phase).

• International Journal of Highway Engineering
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• v.8 no.1 s.27
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• pp.139-152
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• 2006

Many experimental and numerical approaches have been developed to evaluate paving materials and to predict pavement response and distress. Micromechanical simulation modeling is a technology that can reduce the number of physical tests required in material formulation and design and that can provide more details, e.g., the internal stress and strain state, and energy evolution and dissipation in simulated specimens with realistic microstructural features. A clustered distinct element modeling (DEM) approach was implemented In the two-dimensional particle flow software package (PFC-2D) to study the complex behavior observed in asphalt mixture fracturing. The relationship between continuous and discontinuous material properties was defined based on the potential energy approach. The theoretical relationship was validated with the uniform axial compression and cantilever beam model using two-dimensional plane strain and plane stress models. A bilinear cohesive displacement-softening model was implemented as an intrinsic interface and applied for both homogeneous and heterogeneous fracture modeling in order to simulate behavior in the fracture process zone and to simulate crack propagation. A disk-shaped compact tension test (DC(T)) with heterogeneous microstructure was simulated and compared with the experimental fracture test results to study Mode I fracture. The realistic arbitrary crack propagation including crack deflection, microcracking, crack face sliding, crack branching, and crack tip blunting could be represented in the fracture models. This micromechanical modeling approach represents the early developmental stages towards a 'virtual asphalt laboratory,' where simulations of laboratory tests and eventually field response and distress predictions can be made to enhance our understanding of pavement distress mechanisms, such its thermal fracture, reflective cracking, and fatigue crack growth.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.8
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• pp.1227-1234
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• 2013

An analog array with a 1.2 double poly floating gate transistor has been developed with a standard CMOS fabrication process. The programming of each cell by means of an efficient control circuit eliminates the unnecessary erasing operation which has been widely used in conventional analog memories. It is seen that the path of the signal for both the programming and the reading is almost exactly the same since just one comparator supports both operations. It helps to eliminate the effects of the amplifier input-offset voltage problem on the output voltage for the read operation. In the array, there is no pass transistor isolating a cell of interest from the adjacent cells in the array. Instead of the extra transistors, one extra bias voltage, Vmid, is employed. The experimental results from the memory shows that the resolution of the memory is equivalent to the information content of at least six digital cells. Programming/erasing of each cell is achieved with no detectable disturbance of adjacent cells. Finally, the unique shape of the injector structure in a EEPROM is adopted as a cell of analog array. It reduces the programming voltage below the transistor breakdown voltage without any special fabrication process.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.9
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• pp.1324-1328
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• 2013

The reason of train location detection is generally the train interval control between the railway stations and the train path control in the railway station yard in order to avoid train collision. It is very important to know the train location for shortening the train headway, and improving the efficiency of railway maintenance as well as the safe operation of trains. Therefore, the accurate detection of train location is the prerequisite technology in railway signalling system. The track circuit and the wheel sensor of rolling stock have been used to detect the train location widely in urban railway as well as high speed train. The track circuit is continuously monitored by electrical equipment to detect the absence of the train and the tachometer and encoder is used for the wheel sensor to measure the train speed. But speed sensor failures are frequent due to the extremely harsh operating conditions encountered in rail vehicle. The CBTC(Communication based Train Control) system has been used in urban railway system recently. But the installation of CBTC system is very high and the modification of design is difficult. This paper deals with the feasibility of new train location detection method using magnetic sensors.