• 제목/요약/키워드: DC current

검색결과 3,982건 처리시간 0.024초

아크 용접에 적합하며 1차 측 보조회로를 사용하는 영전압-영전류 직류-직류 컨버터 (A Primary-Side-Assisted Zero-Voltage and Zero-Current Switching Full Bridge DC-DC Converter with Transformer Isolation for Arc Welding)

  • 전성집;조규형
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
    • /
    • 제49권10호
    • /
    • pp.683-692
    • /
    • 2000
  • A new primary-side-assisted zero-voltage and zero-current switching full bridge DC-DC converter with transformer isolation is proposed. The auxiliary circuit adopted to assist ZCS for the leading leg is composed of only one small transformer and two diodes. It has a simple and robust structure, and load current control capability even in short circuit conditions. Possibility of magnetic saturation due to asymmetricity of circuits or transient phenomena is greatly reduced, which is a very attractive feature in DC/DC converters with transformer isolation. The power rating of the auxiliary transformer is about 10% of that of the main transformer. Operation of a 12.5KW prototype designed for welding application was verified by experiments.

  • PDF

개선된 영전압$\cdot$영전류 스위칭 3 레벨 DC/DC 컨버터 (An Improved ZVZCS Three-Level DC/DC Converter)

  • 김은수;최선호;박성수;박진영;양승철
    • 전력전자학회:학술대회논문집
    • /
    • 전력전자학회 2002년도 추계학술대회 논문집
    • /
    • pp.121-124
    • /
    • 2002
  • The conventional three-level high frequency phase-shifted dc/dc converter has a disadvantage that a circulating current flows through transformer and switching devices during the freewheeling interval. Due In this circulating current and RMS current stress, conduction losses of transformer and switching devices increases. To alleviate these problems, we propose an improved three-level Zero Voltage and Zero Current Switching (ZVZCS) dc/dc converter using a tapped inductor, a snubber capacitor and two snubber diodes attached at the secondary side of transformer The proposed ZVZCS converter is verified on a 7kW, 30kHz experimental prototype.

  • PDF

Effect of form of applied current on the formation behavior of PEO films on Al6082 alloy

  • Moon, Sungmo;Kim, Juseok;Shin, Heon-Cheol
    • 한국표면공학회지
    • /
    • 제55권1호
    • /
    • pp.9-17
    • /
    • 2022
  • This work is concerned with the formation behavior of PEO (Plasma Electrolytic Oxidation) films on Al6082 alloy under the application of direct current (DC) and alternating current (AC) in an alkaline solution. Arc initiation voltage became much lower by the application of AC than DC, and arc initiation time became shorter under DC than AC. The number of pores present in the PEO films was much larger than that on the surface, irrespective of DC and AC. It was also found that the number of pores in the PEO films formed under AC was more than that under DC and the size of pores is smaller under AC than DC. During the formation of PEO films, a lot of heat was generated and solution temperature increased more rapidly under DC than under AC which is attributed to high PEO film formation voltage under DC than AC.

Zero-Current-Switching in Full-Bridge DC-DC Converters Based on Activity Auxiliary Circuit

  • Chu, Enhui;Lu, Ping;Xu, Chang;Bao, Jianqun
    • Journal of Power Electronics
    • /
    • 제19권2호
    • /
    • pp.353-362
    • /
    • 2019
  • To address the problem of circulating current loss in the traditional zero-current switching (ZCS) full-bridge (FB) DC/DC converter, a ZCS FB DC/DC converter topology and modulation strategy is proposed in this paper. The strategy can achieve ZCS turn on and zero-voltage and zero-current switching (ZVZCS) turn off for the primary switches and realize ZVZCS turn on and zero-voltage switching (ZVS) turn off for the auxiliary switches. Moreover, its resonant circuit power is small. Compared with the traditional phase shift full-bridge converter, the new converter decreases circulating current loss and does not increase the current stress of the primary switches and the voltage stress of the rectifier diodes. The diodes turn off naturally when the current decreases to zero. Thus, neither reverse recovery current nor loss on diodes occurs. In this paper, we analyzed the operating principle, steady-state characteristics and soft-switching conditions and range of the converter in detail. A 740 V/1 kW, 100 kHz experimental prototype was established, verifying the effectiveness of the converter through experimental results.

Digitally Current Controlled DC-DC Switching Converters Using an Adjacent Cycle Sampling Strategy

  • Wei, Tingcun;Wang, Yulin;Li, Feng;Chen, Nan;Wang, Jia
    • Journal of Power Electronics
    • /
    • 제16권1호
    • /
    • pp.227-237
    • /
    • 2016
  • A novel digital current control strategy for digitally controlled DC-DC switching converters, referred to as Adjacent Cycle Sampling (ACS), is proposed in this paper. For the ACS current control strategy, the available time interval from sampling the current to updating the duty ratio, is approximately one switching cycle. In addition, it is independent of the duty ratio. As a result, the contradiction between the processing speed of the hardware and the transient response speed can be effectively relaxed by using the ACS current control strategy. For digitally controlled buck DC-DC switching converters with trailing-edge modulation, digital current control algorithms with the ACS control strategy are derived for three different control objectives. These objectives are the valley, average, and peak inductor currents. In addition, the sub-harmonic oscillations of the above current control algorithms are analyzed and eliminated by using the digital slope compensation (DSC) method. Experimental results based on a FPGA are given, which verify the theoretical analysis results very well. It can be concluded that the ACS control has a faster transient response speed than the time delay control, and that its requirements for hardware processing speed can be reduced when compared with the deadbeat control. Therefore, it promises to be one of the key technologies for high-frequency DC-DC switching converters.

대전력 3상 ZVS 푸쉬풀 컨버터 설계 (Design of a High Power Three-Phase ZVS Push-Pull Converter)

  • 박준성;이상원;최세완
    • 전력전자학회논문지
    • /
    • 제16권3호
    • /
    • pp.209-218
    • /
    • 2011
  • 연료전지와 같은 저전압 대전류 응용에는 입력전류 리플이 작고 변압기의 턴비가 작은 전류원 DC-DC 컨버터가 더 효과적이다. 5kW급 이상의 응용에서는 기존의 단상을 기본으로 하는 전류원 풀브리지, 하프브리지 또는 푸시풀 의 토폴로지로는 스위치등 소자의 전류부담이 크고 소자의 선정 및 최적설계가 용이하지 않다. 본 논문에서는 대전력 고승압 응용에 적합한 능동 클램프방식의 3상 전류원 푸쉬풀 DC-DC 컨버터를 제안한다. 제안한 컨버터는 소자의 전류부담이 작고 전 영역(0~1)의 듀티 사용으로 입력전압 변동이 큰 응용에 적합하다. 3상 고주파변압기를 비롯한 주요부품의 설계방법을 제시하고 5kW급의 시작품으로부터 제안한 컨버터의 타당성 및 성능을 검증하였다.

고효율 전류모드 승압형 DC-DC 컨버터용 집적회로의 설계 (A Design of Integrated Circuit for High Efficiency current mode boost DC-DC converter)

  • 이준성
    • 전자공학회논문지 IE
    • /
    • 제47권2호
    • /
    • pp.13-20
    • /
    • 2010
  • 본 논문에서는 PWM을 활용한 전류모드 고효율 PWM DC-DC 전원변환 집적회로(Integrated Circuit)를 설계하였다. IC에 인가할 수 있는 최대 전압은 40[V]이며 입력 전압이 DC 2.8[V]~330[V]일 때 출력 전압을 이 보다 높은 전압으로 바꿀 수 있는 한편 외부 저항비나 트랜스의 권선비를 조정하여 원하는 DC 전압을 만들어 낼 수 있다. 출력전압의 3[%] 오차를 유지하면서 3[A] 이상의 전류를 부하에 공급할 수 있도록 구현하였다. 제작공정은 0.6[um], 2P_2M CMOS 공정을 사용하였다. 전원전압이 3.6[V]일 때 대기상태에서 소비전력은 1[mW]이하이고 최대 전력변환 효율은 약 86[%]이다. 칩 사이즈는 2100*2000[um2]이며, 칩을 소형패키지에 내장하여 조립하였기 때문에 휴대형기기나 소형 전자기기에 적용이 편리하게 되어 있다.

무변압기형 태양광 인버터의 출력 전류 DC offset 제거 방법 (Output Current DC offset Removal Method for Trans-less PV Inverter)

  • 홍기남;최익;최주엽;이상철;이동하
    • 한국태양에너지학회 논문집
    • /
    • 제32권spc3호
    • /
    • pp.255-261
    • /
    • 2012
  • Since PV PCS uses output current sensor for ac output current control, the sensor's sensing value includes unnecessary offset inevitably. If PV inverter is controlled by the included offset value, it's output current will generate DC offset. The DC offset of output current for trans-less PV inverter is fatal to grid, which results in saturating grid side transformer. Usually DSP controller of PV inverter reads several times sensing value during initial operation and, finally, it's average value is used for offset calibration. However, if temperature changes, the offset changes, too. And also, the switch device is not ideal, both each switching element of the voltage drop difference and on & off time delay difference generate DC offset. Thus, to compensate for deadtime and the switch voltage drop, feedback control by output current DC offset should be provided to compensate additional distortion of the output current. The validity of the proposed method is confirmed through PSIM simulation.

차량용 보조발판의 센서리스 직류전동기 위치 제어 (Sensorless Position Control of DC Motor for the Auxiliary Scaffolding)

  • 이동희
    • 전력전자학회논문지
    • /
    • 제24권6호
    • /
    • pp.389-395
    • /
    • 2019
  • This paper presents the sensorless position control of an auxiliary scaffolding step system for vehicles using DC motors. The designed auxiliary scaffolding step has a mechanical protector at the stop position. At this position, the scaffolding is forcibly stopped by the mechanical protector, and the motor current is dramatically increased to the stall current of the DC motor, thereby increasing the electrical damage. In this study, the estimated back EMF- and current model-based observers are proposed to estimate the motor speed and stop position. A simple V/F acceleration voltage pattern is used to operate the auxiliary scaffolding system. The estimated moving position is adopted to determine the stop position of the DC motor with the load current state. The operating current of the DC motor can be reduced by the estimated moving position and V/F acceleration pattern. At the stop position, the proposed sensorless position controller can smoothly stop the DC motor with the estimated moving position and reduced load current without any mechanical and electrical stress from the stall current from the mechanical protector. The proposed control scheme is verified by the comparison of simulations and experiments.

Active Controlled Primary Current Cutting-Off ZVZCS PWM Three-Level DC-DC Converter

  • Shi, Yong
    • Journal of Power Electronics
    • /
    • 제18권2호
    • /
    • pp.375-382
    • /
    • 2018
  • A novel active controlled primary current cutting-off zero-voltage and zero-current switching (ZVZCS) PWM three-level dc-dc converter (TLC) is proposed in this paper. The proposed converter has some attractive advantages. The OFF voltage on the primary switches is only Vin/2 due to the series connected structure. The leading-leg switches can obtain zero-voltage switching (ZVS), and the lagging-leg switches can achieve zero-current switching (ZCS) in a wide load range. Two MOSFETs, referred to as cutting-off MOSFETs, with an ultra-low on-state resistance are used as active controlled primary current cutting-off components, and the added conduction loss can be neglected. The added MOSFETs are switched ON and OFF with ZCS that is irrelevant to the load current. Thus, the auxiliary switching loss can be significantly minimized. In addition, these MOSFETs are not series connected in the circuit loop of the dc input bus bar and the primary switches, which results in a low parasitic inductance. The operation principle and some relevant analyses are provided, and a 6-kW laboratory prototype is built to verify the proposed converter.