• Ceramist
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• v.21 no.4
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• pp.378-387
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• 2018

The optimal fabrication conditions for $Gd_{0.1}Ce_{0.9}O_{2-{\delta}}$(GDC) buffer layer and $La_{0.6}Sr_{0.4}Co_{0.2}Fe_{0.8}O_{3-{\delta}}$ (LSCF) cathode on 1mol% $CeO_2-10mol%\;Sc_2O_3$ stabilized $ZrO_2$ (CeScSZ) electrolyte were investigated for application of IT-SOFCs. GDC buffer layer was used in order to prevent undesired chemical reactions between LSCF and CeScSZ. These experiments were carried out with $5{\times}5cm^2$ anode supported unit cells to investigate the tendencies of electrochemical performance, Microstructure development and interface reaction between LSCF/GDC/CeScSZ along with the variations of GDC buffer layer thickness, sintering temperatures of GDC and LSCF were checked, respectively. Electrochemical performance was analyzed by DC current-voltage measurement and AC impedance spectroscopy. Microstructure and interface reaction were investigated by scanning electron microscopy (SEM) and energy dispersive spectroscopy (EDS). Although the interfacial reaction between these materials could not be perfectly inhibited, We found that the cell, in which $6{\mu}m$ GDC interlayer sintered at $1200^{\circ}C$ and LSCF sintered at $1000^{\circ}C$ were applied, showed good interfacial adhesions and effective suppression of Sr, thereby resulting in fairly good performance with power density of $0.71W/cm^2$ at $800^{\circ}C$ and 0.7V.

• Journal of the Korean institute of surface engineering
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• v.56 no.2
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• pp.147-151
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• 2023

Transparent ZnO (100 nm thick) and ZnO/Ti/ZnO (ZTZ) films were prepared with radio frequency (RF) and direct current (DC) magnetron sputtering on the glass substrate at room temperature. During the ZTZ film deposition, the thickness of the Ti interlayer was varied, such as 6, 9, 12, and 15 nm, while the thickness of ZnO films was kept at 50 nm to investigate the effect of the Ti interlayer on the crystallization and opto-electrical performance of the films. From the XRD pattern, it is concluded that the 9 nm thick Ti interlayer showed some characteristic peaks of Ti (200) and (220), and the grain size of the ZnO (002) enlarged from 13.32 to 15.28 nm as Ti interlayer thickness increased. In an opto-electrical performance observation, ZnO single-layer films show a figure of merit of 1.4×10^-11 Ω^-1, while ZTZ films with a 9 nm-thick Ti interlayer show a higher figure of merit of 2.0×10^-5 Ω^-1.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.9
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• pp.25-33
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• 2007

In this paper, the high isolation and wideband 94 GHz MIMIC(Millimeter-wave Monolithic Integrated Circuit) single balanced cascode mixer was designed and fabricated. Also, we designed and fabricated a 3 dB tandem coupler which has a high isolation and wideband characteristic. The single balanced resistive mixer which does not require an external IF balun was designed using the 0.1 ${\mu}m$ InGaAs/InAlAs/GaAs metamorphic HEMT(High Electron Mobility Transistor). The DC characteristics of MHEMT's are 665 mA/mm of drain current density, 691 mS/mm of maximum transconductance. The current gain cut-off frequency($f_T$) is 189 GHz and the maximum oscillation frequency($f_{max}$) is 334 GHz. A 94 GHz single balanced cascode mixer was fabricated using our 0.1 ${\mu}m$ MHEMT MIMIC process. From the measurements, the fabricated couplers showed wideband characteristics. The conversion loss of single balanced cascode mixer was 9.8 dB at an LO power of 10.9 dBm. The LO to RF isolation of single balanced cascode mixer was 29.5 dB at 94 GHz. We obtained in this study a higher LO-RF isolation compared to some other single balanced mixers.

• Korean Journal of Materials Research
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• v.5 no.6
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• pp.754-762
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• 1995

Strontium titanate(SrTiO$_3$) thin film was prepared on Si substrates by RF magnetron sputtering for a high capacitance density required for the next generation of LSTs. The optimum deposition conditions for SrTiO$_3$thin film were investigated by controlling the deposition parameters. The crystallinity of films and the interface reactions between SrTO$_3$film and Si substrate were characterized by XRD and AES respectively. High quality films were obtained by using the mixed gas of Ar and $O_2$for sputtering. The films were deposited at various bias voltages to obtain the optimum conditions for a high quality file. The best crystallinity was obtained at film thickness of 300nm with the sputtering gas of Ar+20% $O_2$and the bias voltage of 100V. The barrier layer of Pt(100nm)/Ti(50nm) was very effective in avoiding the formation of SiO$_2$layer at the interface between SrTiO$_3$film and Si substrate. The capacitor with Au/SrTiO$_3$/Pt/Ti/SiO$_2$/Si structure was prepared to measure the electric and the dielectric properties. The highest capacitance and the lowest leakage current density were obtained by annealing at $600^{\circ}C$ for 2hrs. The typical specific capacitance was 6.4fF/$\textrm{cm}^2$, the relative dielectric constant was 217, and the leakage current density was about 2.0$\times$10$^{-8}$ A/$\textrm{cm}^2$ at the SrTiO$_3$film with the thickness of 300nm.