• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.4
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• pp.261-268
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• 2020

Transformer saturation in full bridge (FB) isolated DC-DC converters is caused by uneven switching speeds and voltage drops in semiconductor devices and mismatched gate signals. In order to prevent transformer saturation, most popular and widely used approach is to insert a capacitor in series with the transformer windings. This study conducts extensive analyses on transformer saturation and the effect of DC blocking capacitors when they are placed in the primary or secondary windings of a transformer. The effect of the DC blocking capacitors is verified in voltage-fed and current-fed FB converters.

• Journal of Electrical Engineering and Technology
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• v.12 no.5
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• pp.1902-1915
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• 2017

This paper presents the evaluation of a three-phase three-level DC-DC converter which achieves the soft switching condition for all switches in the circuit and uses the phase-shift PWM strategy to adjust electric power at the output side. According to the analysis, the operation modes can be categorized into two cases: in the first case, where the phase shift angle is less than 120 degrees and in the second case, where the phase shift angle is more than 120 degrees. The outer switches of the circuit operate under ZVS condition and the inner switches operate under ZVZCS condition. It has been discovered that under ZCS condition of the inner switches, when the blocking capacitors decrease, they make the voltage across the blocking capacitor higher so the current reduce rapidly. A three-phase three-level DC-DC converter has a maximum efficiency of 93.5% when its load is of 5.7 kW. The results from the experiment have been compared to the results obtained by the $MATLAB^{(R)}$ simulator in order to confirm the validity of the proposed converter.

• Journal of Power Electronics
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• v.19 no.6
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• pp.1486-1495
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• 2019

Dealing with the DC link fault poses a technical problem for an HVDC based on a modular multilevel converter. The fault suppressing mechanisms of several sub-module topologies with DC fault current blocking capacity are examined in this paper. An improved half-bridge sub-module topology with double direction control switch is also designed to address the additional power consumption problem, and a sub-module topology called hybrid double direction blocking sub module (HDDBSM) is proposed. The DC fault suppression characteristics and sub-module capacitor voltage balance problem is also analyzed, and a self-startup method is designed according to the number of capacitors. The simulation model in PSCAD/EMTDC is built to verify the self-startup process and the DC link fault suppression features.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.288-292
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• 2002

We propose the new type of on-chip ESD protection method for RF applications. By using the properties of RF circuits, we can use the short-circuited stub as ESD protection device in front of the DC blocking capacitor Specially, we can use short-circuited stub as the portion of the matching circuit so to reduce the and various parameters of the transmission line. This new type ESD protection method is very different from the conventional ESD protection method. With the new type ESD protection method, we remove the parasitic capacitance of ESD protection device which degrade the performance of core circuit.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1608-1609
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• 2011

In this study, in order to develop the evaluation method for XLPE materials for HVDC cables, DC/Impulse superposition testing system was builded up. Throughout the P-spice simulation, optimal values of the protection resistor for the DC generation system and the blocking capacitor for the Impulse generator were calculated. DC/Impulse superposition system showed good result maintaining their proper wave shapes and amplitudes. This system would be planned to apply to the evaluation of XLPE materials for HVDC cables.

• Proceedings of the KIPE Conference
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• 2019.11a
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• pp.40-42
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• 2019

절연형 전력변환기에서 사용되는 고주파 변압기는 반도체 소자의 스위칭 시간, 전압 강하, 게이트 신호의 불균형 등으로 인해 변압기의 양과 음의 전압-시간(volt-second)에 차이가 발생할 수 있다. 본 논문은 절연형 풀브리지 타입 전력변환기에서 DC 성분에 의한 변압기 코어의 포화문제를 방지하기 위해 사용되는 DC 블로킹 캐패시터(DC blocking capacitor)의 설계 방법에 대해 분석하고 실험을 통해 증명한다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.3
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• pp.432-438
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• 2001

In this paper, after applying Defected Ground Structure(DGS) to DC block, changes of gap and length of λ/4 coupled line are investigated by EM simulation and fabrication. As a result, on condition of the same output with the case using typical DC block, the gap between λ/4 coupled line is widen from 0.1 mm to 0.46 mm by 0.36 mm and the length of λ/4 coupled line gets shorter from 17.7 mm to 13.2 mm by 4.5 mm. Also three type power amplifiers using blocking capacitor, typical DC block and DGS DC block are fabricated and investigated. At first, when S parameter characteristics of each amplifier are considered at frequency band of 3.2 +-0.O5 GHz, every amplifier has similar characteristics of gain and S parameter. Second when the output power of amplifiers is 25 dBm after putting CW signal of 3.2 GHz into three type amplifiers, the difference of dominant signal and 2nd harmonic signal using blocking capacitor, typical DC block and DGS DC block is each -44.83 dBc, -66.84 dBc and -64.33 dBc. Therefore harmonic characteristics of amplifiers using typical DC block and DGS DC block is almost same.

• Proceedings of the KIEE Conference
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• 2006.10d
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• pp.125-128
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• 2006

This paper presents a novel type soft switching PWM power frequency AC-AC converter using bidirectional active switches or single phase utility frequency AC-high frequency AC matrix converter. This converter can directly convert utility frequency AC (UFAC, 50Hz/60Hz) power to high frequency AC (HFAC) power ranging more than 20kHz up to 100kHz. A novel soft switching PWM prototype of high frequency multi-resonant PWM controlled UFAC-HFAC matrix converter using antiparallel one-chip reverse blocking IGBTs manufactured by IXYS corp. is based on the soft switching resonance with asymmetrical duty cycle PWM strategy. This single phase UFAC-HFAC matrix converter has some remarkable features as electrolytic capacitor DC busline linkless topology, unity power factor correction and sine-wave line current shaping, simple configuration with minimum circuit components, high efficiency and downsizing. This series load resonant UFAC-HFAC matrix converter, incorporating bidirectional active power switches is developed and implemented for high efficiency consumer induction heated food cooking appliances in home uses and business-uses. Its operating performances as soft switching operating ranges and high frequency effective power regulation characteristics are illustrated and discussed on the basis of simulation and experimental results.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.364-367
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• 2001

ZVS Full-bridge converter is widely used in medium power level(1-3kW). ZVS can be designed within a limited load range and ZVS failure at light load condition is assumed to be acceptable within the given efficiency and thermal constraints. However, unbalanced ZVS resonant energy caused by dc blocking capacitor may alleviate the switching loss problem at light load condition. ZVS resonant energy is unbalanced by do blocking capacitor. This problem causes loss and heat concentration of a switch leg, In this paper, this problem is analyzed, and a novel control method is proposed to solve the problem.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.301-303
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• 2001

In this paper we present a Capacitor Charging Power Supply (CCPS) using a series-resonant three-level inverter topology to improve voltage regulation and use semiconductor switches having low blocking voltage capability such as MOSFETs. This inverter can be operated with two modes, Full Power Mode (FPM) and Half Power Mode (HPM). In FPM inverter supplies the high frequency step up transformer with full DC-link voltage and in HPM with half DC-link voltage. HPM switching method will be adopted when CCPS output voltage reaches the preset target value and operates in refresh mode-charge is maintained on the capacitor. In this topology each semiconductor devices blocks a half of the DC-link voltage[2]. A 15kW, 30kV CCPS has been built and will be tested for an electric precipitator application. The CCPS operates from an input voltage of 500VDC and has a variable output voltage between 10 to 30kV and 1kHz repetition rate at 44nF capacitive load [3]. A resonant frequency of 67.9kHz was selected and a voltage regulation of $0.83\%$ has been achieved through the use of half power mode without using the forced cut off the switch current [1]. The theory of operation, circuit topology and test results are given.