• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.390-390
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• 2012

Information technology industries has grown rapidly and demanded alternative memories for the next generation. The most popular random access memory, dynamic random-access memory (DRAM), has many advantages as a memory, but it could not meet the demands from the current of developed industries. One of highlighted alternative memories is magnetic random-access memory (MRAM). It has many advantages like low power consumption, huge storage, high operating speed, and non-volatile properties. MRAM consists of magnetic-tunnel-junction (MTJ) stack which is a key part of it and has various magnetic thin films like CoFeB, FePt, IrMn, and so on. Each magnetic thin film is difficult to be etched without any damages and react with chemical species in plasma. For improving the etching process, a high density plasma etching process was employed. Moreover, the previous etching gases were highly corrosive and dangerous. Therefore, the safety etching gases are needed to be developed. In this research, the etch characteristics of CoFeB magnetic thin films were studied by using an inductively coupled plasma reactive ion etching in $CH_4/O_2/Ar$ gas mixes. TiN thin films were used as a hardmask on CoFeB thin films. The concentrations of $O_2$ in $CH_4/O_2/Ar$ gas mix were varied, and then, the rf coil power, gas pressure, and dc-bias voltage. The etch rates and the selectivity were obtained by a surface profiler and the etch profiles were observed by a field emission scanning electron microscopy. X-ray photoelectron spectroscopy was employed to reveal the etch mechanism.

• Journal of Sensor Science and Technology
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• v.6 no.4
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• pp.258-264
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• 1997

$YBa_{2}Cu_{3}O_{7}$ single layer dc SQUID magnetometers, prepared on $1\;cm^{2}\;SrTiO_{3}$ substrates, have been fabricated and characterized. Based on the analytical description, a SQUID magnetometer design having a 8.5 mm pickup coil with 2.6 mm linewidth, and a SQUID inductance Ls = 50 pH with $3\;{\mu}m$ Josephson junctions is presented. The devices showed a maximum modulation voltage depth of $65\;{\mu}V$ and a magnetic field noise of 0.6 pT /$\sqrt{Hz}$ at 1 Hz. Clear traces of human magnetocardiogram could be obtained with the SQUID magnetometer operating at 77 K.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.6
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• pp.187-193
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• 2018

There has been a gradual increase in the demand for the electric power in Korea. In order to meet the demand, power station should have technical functions with increased effectiveness. When accident happens in electric machinery at power stations, huge amount of economic losses and mulfunction of equipments occur. One of the accidents is a deteriorated cables operating power stations. In order to prevent cable accident in advance, we should monitor the insulation status of the cable. Cable accidents are resulting from the junctions. We have developed and installed a device in order to identify the status of junction part of power cable at Korea Western Power Co., Ltd.. We performed an accurate diagnosis for the stable utilization of junctions where the accidents occurs most frequently, and to increase the reliability. In this paper, we present the concepts of our device and the method of monitoring diagnosis for the stable use of junctions at cables predicting the life time of cables by analyzing the data obtained by the device. We also present the hardware aspect of the device we have developed.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.4
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• pp.67-72
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• 2022

This study presents the design of power amplifier (PA) in 60 nm GaN/Si HEMT technology. A customized transistor model enables the designing circuits operating at W-band. The all matching network of the PA was composed of equivalent transformer circuit to reduce matching loss. And then, equivalent transformer is several advantages without any additional inductive devices so that a wideband power characteristic can be achieved. The designed die area is 3900 ㎛ × 2300 ㎛. The designed results at center frequency achieved the small signal gain of 15.9 dB, the saturated output power (Psat) of 29.9 dBm, and the power added efficiency (PAE) of 24.2% at the supply voltage of 12 V.

• Journal of Advanced Navigation Technology
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• v.27 no.4
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• pp.463-468
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• 2023

In this paper, we proposed reconfigurable dual polarization patch array antenna that can select two polarizations(Vertical, RHCP) using defected ground structure and Pin diode. The proposed antenna was designed arranging a circular polarization patch antenna implemented with a square microstrip patch and two slots 3x3 at 25.8mm placed, a half-wavelength of 5.8 GHz. Conect the pin diode and the capacitor to the slot diagonally placed on the ground of each antennas, and select polarization using the open/short operating according to the application of DC voltage to the pin diode. As a result of the design, the gain of the antenna is 11.7 dBi at vertical polarization and 11.6 dBic at RHCP. The axial ratio is 20.3 dB at 1.8 dB vertical polarization at RHCP. Mutual Coupling is Maximum to -20.8 dB for vertical polarization and Maximum to -30.1 dB for RHCP.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.3
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• pp.46-55
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• 2016

This work proposes a 13b 100MS/s 45nm CMOS ADC with a high dynamic performance for IF-domain high-speed signal processing systems based on a four-step pipeline architecture to optimize operating specifications. The SHA employs a wideband high-speed sampling network properly to process high-frequency input signals exceeding a sampling frequency. The SHA and MDACs adopt a two-stage amplifier with a gain-boosting technique to obtain the required high DC gain and the wide signal-swing range, while the amplifier and bias circuits use the same unit-size devices repeatedly to minimize device mismatch. Furthermore, a separate analog power supply voltage for on-chip current and voltage references minimizes performance degradation caused by the undesired noise and interference from adjacent functional blocks during high-speed operation. The proposed ADC occupies an active die area of $0.70mm^2$, based on various process-insensitive layout techniques to minimize the physical process imperfection effects. The prototype ADC in a 45nm CMOS demonstrates a measured DNL and INL within 0.77LSB and 1.57LSB, with a maximum SNDR and SFDR of 64.2dB and 78.4dB at 100MS/s, respectively. The ADC is implemented with long-channel devices rather than minimum channel-length devices available in this CMOS technology to process a wide input range of $2.0V_{PP}$ for the required system and to obtain a high dynamic performance at IF-domain input signal bands. The ADC consumes 425.0mW with a single analog voltage of 2.5V and two digital voltages of 2.5V and 1.1V.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.155.2-155.2
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• 2013

Strain-relaxed SiGe layer on Si substrate has numerous potential applications for electronic and opto- electronic devices. SiGe layer must have a high degree of strain relaxation and a low dislocation density. Conventionally, strain-relaxed SiGe on Si has been manufactured using compositionally graded buffers, in which very thick SiGe buffers of several micrometers are grown on a Si substrate with Ge composition increasing from the Si substrate to the surface. In this study, a new plasma process, i.e., the combination of PIII&D and HiPIMS, was adopted to implant Ge ions into Si wafer for direct formation of SiGe layer on Si substrate. Due to the high peak power density applied the Ge sputtering target during HiPIMS operation, a large fraction of sputtered Ge atoms is ionized. If the negative high voltage pulse applied to the sample stage in PIII&D system is synchronized with the pulsed Ge plasma, the ion implantation of Ge ions can be successfully accomplished. The PIII&D system for Ge ion implantation on Si (100) substrate was equipped with 3'-magnetron sputtering guns with Ge and Si target, which were operated with a HiPIMS pulsed-DC power supply. The sample stage with Si substrate was pulse-biased using a separate hard-tube pulser. During the implantation operation, HiPIMS pulse and substrate's negative bias pulse were synchronized at the same frequency of 50 Hz. The pulse voltage applied to the Ge sputtering target was -1200 V and the pulse width was 80 usec. While operating the Ge sputtering gun in HiPIMS mode, a pulse bias of -50 kV was applied to the Si substrate. The pulse width was 50 usec with a 30 usec delay time with respect to the HiPIMS pulse. Ge ion implantation process was performed for 30 min. to achieve approximately 20 % of Ge concentration in Si substrate. Right after Ge ion implantation, ~50 nm thick Si capping layer was deposited to prevent oxidation during subsequent RTA process at $1000^{\circ}C$ in N2 environment. The Ge-implanted Si samples were analyzed using Auger electron spectroscopy, High-resolution X-ray diffractometer, Raman spectroscopy, and Transmission electron microscopy to investigate the depth distribution, the degree of strain relaxation, and the crystalline structure, respectively. The analysis results showed that a strain-relaxed SiGe layer of ~100 nm thickness could be effectively formed on Si substrate by direct Ge ion implantation using the newly-developed PIII&D process for non-gaseous elements.

• KIPS Transactions on Computer and Communication Systems
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• v.10 no.7
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• pp.199-204
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• 2021

Digital substation refers to a substation that digitizes functions and communication methods of power facilities such as monitoring, measuring, control, protection, and operation based on IEC 61850, an international standard for the purpose of intelligent power grids. Based on the intelligent operating system, efficient monitoring and control of power facilities is possible, and automatic recovery function and remote control are possible in the event of an accident, enabling rapid power failure recovery. With the development of digital technology and the expansion of the introduction of eco-friendly renewable energy and electric vehicles, the spread of direct current distribution systems is expected to expand. MVDC is a system that utilizes direct current lines with voltage levels and transmission capacities between HVDCs applied to conventional transmission systems and LVDCs from consumers. Converting existing lines in substations, where most power equipment is alternating current centric, to direct current lines will reduce transmission losses and ensure greater current capacity. The process bus of a digital substation is a communication network consisting of communication equipment such as Ethernet switches that connect installed devices between bay level and process level. For MVDC linkage to existing digital substations, the process level was divided into two buses: AC and DC, and a system that can be comprehensively managed in conjunction with diagnostic IEDs as well as surveillance and control was proposed.