• The Journal of the Acoustical Society of Korea
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• v.22 no.5
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• pp.337-344
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• 2003

In DC/DC converter and VVVF inverter, which are the must dominant noise sources of Maglev train, noise is radiated from core and coil excited by MS(Magnetostriction). The main noise source of DC/DC converter is transformer whose spectrum shows strong peaks associated with harmonics of exciting frequency, On the other hand, LIM/VVVF noise is dominated by the harmonics of switching frequency, whereas harmonics of exciting frequency are not significant. As switching frequency is increased in VVVF inverter, it is shown that the harmonics are shifted to higher frequency range. If switching frequency is increased from 700㎐ to 2 ㎑, It is measured that noise can be reduced by 5 to 6 ㏈. Since complete mathematical description of MS phenomena is far beyond the present technology, vibration spectrum is investigated qualitatively in this paper, where effect of increasing switching frequency is confirmed.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.71-73
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• 2007

본 논문에서는 새로운 연료전지용 3상 전류형 능동 클램프 DC-DC 컨버터를 제안한다. 전류형 컨버터 구조에 능동 클램프 회로를 채용하여 과도기에 발생하는 서지전압을 저감하였고 모든 스위치에서 영전압 스위칭을 하며, 그 장점으로 : 연속적인 입력전류, 전압 오버슈트 제거, 영전압 턴 온 스위칭, 고주파 변압기 1차/2차 측에 부가적인 스너버 회로의 필요성 제거, 소프트 스위칭에 의한 저속 다이오드 적용 등이 있다. 더구나 대용량 발전 시스템에 적합하도록 전류형 컨버터 구조와 3상 전력변환 회로를 결합하였다. 3상 전력변환 적용의 장점은 : 입력전류 및 출력전압 주파수의 3배 증가, 스위치에 흐르는 RMS 전류 저감, 필터소자 용량 및 부피 감소, 고주파 변압기 이용률 증가, 전력회로의 단순화에 따른 전체 사이즈 축소 및 신뢰성 향상 등이 있다. 제안하는 3상 전류형 능동 클램프 DC-DC 컨버터는 이러한 장점들 때문에 발전용 연료전지 시스템의 승압형 DC-DC 컨버터에 적합하며 대용량 태양전지 발전 시스템 및 배터리 충전기 등에도 적용할 수 있다. 새로운 3상 DC-DC 컨버터와 함께 3상 PWM 알고리즘을 제안하며, 시뮬레이션과 프로토타입 제작, 실험을 통하여 그 성능을 평가, 확인한다.

• Journal of the Korean Society of Industry Convergence
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• v.22 no.3
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• pp.373-379
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• 2019

Nowadays, the IoT portable electronic devices have become more useful and diverse, so they require various supply voltage levels to operate. This paper presents a DC-DC buck converter with pulse width modulation (PWM) for portable electronic devices. The proposed step-down DC-DC converter consists of passive elements such as capacitors, inductors, and resistors and an integrated chip (IC) for signal control to reduce power consumption and improves ripple voltage with the resolution. The proposed DC-DC converter is simulated and analyzed in PSPICE circuit design platform, and implemented on the prototype PCB board with a Texas Instruments LM5165 IC. The proposed buck converter is showed 92.6% of peak efficiency including a load current range of 4-10 mA, 3.29 mV of the voltage ripple at 5 V output voltage for the supply voltage 12 V. Measured and Simulated power efficiency are made good agreement with each other.

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.5
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• pp.449-454
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• 1999

A new scheme of the automotive High Intensity Discharge (HlD) lamp ballast systems is proposed. The p proposed scheme consists of the high frequency IX DC converter and the low frequency DC-AC inverter, like t that the conventional HID ballast system. However, this system separates the input voltage of the ignitor from t the dc link voltage, which results in the use of lower voltage rating power devices for the HID lamp ballast s system, comparlu with convention띠 system. As a result, proposed system has a lower cost and higher e efficiency. This paper presents th$\varepsilon$ design and anlaysis of the propoSlU ballast and some 앉아、nmental results.

• Journal of IKEEE
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• v.25 no.3
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• pp.517-527
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• 2021

This paper presents the phase-shift full-bridge DC-DC converter using the one-chip micom. The proposed converter primary is the full-bridge power topology that operates with the unipolar pulse-width modulation (PWM) by the phase-shift method, and the secondary is the full-bridge full-wave rectifier composed of four diodes. The control of proposed converter is performed by the one-chip micom and its MOSFET switches are driven by the bootstrap circuit. Thus the total system of proposed converter is simple. The proposed converter achieves high-efficiency using the resonant circuit and blocking capacitor. In this paper, first, the power-circuit operation of proposed converter is explained according to each operation mode. And the power-circuit design method of proposed converter is shown, and the software control algorithm on the micom and the feedback and switch drive circuits operating the proposed converter are described, briefly. Then, the operation characteristics of proposed converter are validated through the experimental results of a designed and implemented prototype converter by the shown design and implementation method in this paper. The highest efficiency in the results was about 92%.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.281-285
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• 2013

Transfer function of Buk DC-DC converter is derived using Laplace transformed LC filter. Using root locus and simulation waveform, this paper shows that Type2 controller proposed in reference has poor performance. Using root locus PI controller has designed. Using operational amp, PI controller is realized. Properly operated Type2 controller is proposed and proved using simulation result.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.1
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• pp.79-87
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• 2000

본 논문은 저 도전 손실을 갖는 새로운 단단, 단일 스위치 역률보상 부스트형 교류/직류 변환기를 소개한다. 제안한 변환기는 약간의 구조적 차이점을 제외하고 기존의 변환기와 동일하게 해석될 수 있다. 먼저, 제안한 변환기와 기존의 변환기의 동작원리를 파악하여 두 변환기의 차이점을 이해하고 1단 역률 보상 교류/직류 변환기의 구조적 문제점인 에너지 저장 커패시터에서의 직류 전압 상승을 방지하기 위한 직류 부스 전압 궤환 방식을 도입하여 제안한 변환기에 적용하였다. 100W급 변환기를 제작/실험하여 본 변환기의 타당성을 검증하였다.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.42 no.11
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• pp.981-987
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• 2014

DC/DC switching power converters are commonly used to generate a regulated DC output voltage with high efficiency. The DC/DC converter is composed of a MOSFET (metal-oxide semiconductor field effect transistor), a PWM-IC (pulse width modulation-integrated circuit) controller, inductor, capacitor, etc. It is shown that the variation of threshold voltage and the breakdown voltage in the electrical characteristics of MOSFET occurs by radiation effects in TID (Total Ionizing Dose) testing at the low energy ${\gamma}$ rays using $^{60}Co$, and 5 heavy ions make the gate of MOSFET broken in SEGR (Single Event Gate Rupture) testing. TID testing on MOSFET is accomplished up to the total dose of 40 krad, and the cross section($cm^2$) versus LET(MeV/mg/$cm^2$) in the MOSFET operation is studied at SEGR testing after implementation of the controller board.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.3
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• pp.95-100
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• 2004

A control alogorithm using sliding mode and neural network for Buck type DC-DC converter is presented. Also, we conform a rightness the proposal method by comparing a theoretical values and experimental values obtained from experiment using DSP(digital signal processor). Performance comparisons made with the general hysteresis controller clearly bring out the superior performance of the proposal neural network controller. This paper will be applied to other power conversion system using the proposal neural network controller.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.10
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• pp.2253-2260
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• 2012

In this paper, an efficient hardware architecture is proposed for inverse transform and inverse quantization of H.264/AVC decoder. The previous inverse transform and quantization architecture has a different AC and DC coefficients decoding order. In the proposed architecture, IQ is achieved after IT regardless of the DC or AC coefficients. A common operation unit is also proposed to reduce the computational complexity of inverse quantization. Since division operation is included in the previous architecture, it will generate errors if the processing order is changed. In order to solve the problem, the division operation is achieved after IT to prevent errors in the proposed architecture. The architecture is implemented with 3-stage pipeline and a parallel vertical and horizontal IDCT is also implemented to reduce the operation cycle. As a result of analyzing the proposed ITIQ architecture operation cycle for one macroblock, the proposed one has improved by 45% than the previous one.