• Title/Summary/Keyword: Cyclic codes

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Fatigue experiment of stud welded on steel plate for a new bridge deck system

  • Ahn, Jin-Hee;Kim, Sang-Hyo;Jeong, Youn-Ju
    • Steel and Composite Structures
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    • v.7 no.5
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    • pp.391-404
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    • 2007
  • This paper presents push-out tests of stud shear connectors to examine their fatigue behavior for developing a new composite bridge deck system. The fifteen push-out specimens of D16 mm stud welded on 9 mm steel plate were fabricated according to Eurocode-4, and a series of fatigue endurance test and residual strength test were performed. Additionally, the stiffness and strength variations by cyclic loading were compared. The push-out test, when the stiffness reduction ratio of the specimens was 0.95 under cyclic load, resulted in the failure of the studs. The stiffness variation of the push-out specimens additionally showed that the application of cyclic loads reduced the residual strength. The fatigue strength of the shear connectors were compared with the design values specified in the Eurocode-4, ASSHTO LRFD and JSSC codes. The comparison result showed that the fatigue endurance of the specimens satisfies the design values of these codes.

New Proof of Minimum Distance for Binary Cyclic Codes with $d_{min}$=5 (최소거리가 5인 이진 순회부호의 최소거리에 관한 새로운 증명)

  • 노종선
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.10A
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    • pp.1576-1581
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    • 2000
  • We investigated into the minimum distance of a primitive binary cyclic code C with a generator polynomial g(x)=$m_1(x)m_{d}(x)$. It is known that the necessary and sufficient condition for C to have minimum distance five is the fact that \ulcorner is an APN power function. In this paper we derived the new proof of minimum distance for the primitive binary cyclic codes with minimum distance five.

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HDL Codes Generator for Cyclic Redundancy Check Codes (순환중복검사 부호용 하드웨어 HDL 코드 생성기)

  • Kim, Hyeon-kyu;Yoo, Ho-young
    • Journal of IKEEE
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    • v.22 no.4
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    • pp.896-900
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    • 2018
  • Traditionally, Linear Shift Feedback Register (LFSR) has been widely employed to implement Cyclic Redundant Check (CRC) codes for a serial input. Since many applications including network and storage systems demand as high throughput as ever, various efforts have been made to implement CRC hardware to support parallel inputs. Among various parallel schemes, the look-ahead scheme is one of the most widely used schemes due to its short critical path. However, it is very cumbersome to design HDL codes for parallel CRC codes since the look-ahead scheme is inevitable to consider how register and input values move in the next cycles. Thus, this paper proposes a novel CRC hardware generator, which automatically produces HDL codes given a CRC polynomial and parallel factor. The experimental results verify the applicability to use the proposed generator by analyzing the synthesis results from the generated HDL code.

Nonlinear Product Codes and Their Low Complexity Iterative Decoding

  • Kim, Hae-Sik;Markarian, Garik;Da Rocha, Valdemar C. Jr.
    • ETRI Journal
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    • v.32 no.4
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    • pp.588-595
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    • 2010
  • This paper proposes encoding and decoding for nonlinear product codes and investigates the performance of nonlinear product codes. The proposed nonlinear product codes are constructed as N-dimensional product codes where the constituent codes are nonlinear binary codes derived from the linear codes over higher order alphabets, for example, Preparata or Kerdock codes. The performance and the complexity of the proposed construction are evaluated using the well-known nonlinear Nordstrom-Robinson code, which is presented in the generalized array code format with a low complexity trellis. The proposed construction shows the additional coding gain, reduced error floor, and lower implementation complexity. The (64, 24, 12) nonlinear binary product code has an effective gain of about 2.5 dB and 1 dB gain at a BER of $10^{-6}$ when compared to the (64, 15, 16) linear product code and the (64, 24, 10) linear product code, respectively. The (256, 64, 36) nonlinear binary product code composed of two Nordstrom-Robinson codes has an effective gain of about 0.7 dB at a BER of $10^{-5}$ when compared to the (256, 64, 25) linear product code composed of two (16, 8, 5) quasi-cyclic codes.

Monotonic and cyclic flexural tests on lightweight aggregate concrete beams

  • Badogiannis, E.G.;Kotsovos, M.D.
    • Earthquakes and Structures
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    • v.6 no.3
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    • pp.317-334
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    • 2014
  • The work is concerned with an investigation of the advantages stemming from the use of lightweight aggregate concrete in earthquake-resistant reinforced concrete construction. As the aseismic clauses of current codes make no reference to lightweight aggregate concrete beams made of lightweight aggregate concrete but designed in accordance with the code specifications for normal weight aggregate concrete, together with beams made from the latter material, are tested under load mimicking seismic action. The results obtained show that beam behaviour is essentially independent of the design method adopted, with the use of lightweight aggregate concrete being found to slightly improve the post-peak structural behaviour. When considering the significant reduction in deadweight resulting from the use of lightweight aggregate concrete, the results demonstrate that the use of this material will lead to significant savings without compromising the structural performance requirements of current codes.

Performance Analysis of CRC Error Detecting Codes (CRC 오류검출부호의 성능 분석)

  • 염흥렬;권주한;양승두;이만영
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.14 no.6
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    • pp.590-603
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    • 1989
  • In tnis paper, the CRC-CCITT code and primitive polynomial CRC code are selected for analysing error detecting performance. However, general formulas for obtaining the weight distribution of these two CRC codes are not so far dericed. So, a new method for calculating the weight distribution of the shortened cyclic Hamming code is presented and an undetected error probability of these two codes is obtained when used in cell of ATM for broadband ISDN user-network interface. Consequently, we show that CRC code too much does affect its error detection performance. All the computer simulation is performed by IBM PC/AT.

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7.7 Gbps Encoder Design for IEEE 802.11ac QC-LDPC Codes

  • Jung, Yong-Min;Chung, Chul-Ho;Jung, Yun-Ho;Kim, Jae-Seok
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.4
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    • pp.419-426
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    • 2014
  • This paper proposes a high-throughput encoding process and encoder architecture for quasi-cyclic low-density parity-check codes in IEEE 802.11ac standard. In order to achieve the high throughput with low complexity, a partially parallel processing based encoding process and encoder architecture are proposed. Forward and backward accumulations are performed in one clock cycle to increase the encoding throughput. A low complexity cyclic shifter is also proposed to minimize the hardware overhead of combinational logic in the encoder architecture. In IEEE 802.11ac systems, the proposed encoder is rate compatible to support various code rates and codeword block lengths. The proposed encoder is implemented with 130-nm CMOS technology. For (1944, 1620) irregular code, 7.7 Gbps throughput is achieved at 100 MHz clock frequency. The gate count of the proposed encoder core is about 96 K.

Fast Multi-Rate LDPC Encoder Architecture for WiBro System (WiBro 시스템을 위한 고속 LDPC 인코더 설계)

  • Kim, Jeong-Ki;S.P., Balakannan;Lee, Moon-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.45 no.7
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    • pp.1-8
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    • 2008
  • Low Density Parity Check codes(LDPC) are recently focused on communication systems due to its good performance. The standard of WiBro has also included LDPC codes as a channel coding. The weak point of implementation for LDPC encoder is that conventional binary Matrix Vector Multiplier has many clock cycles which limit throughput. In this paper, we propose semi-parallel architecture by using cyclic shift registers and exclusive-OR without conventional Matrix Vector Multipliers over the standard parity check matrices with Circulant Permutation Matrices(CPM). Furthermore, multi-rate encoder is designed by using proposed architecture. Our encoder with multi-rate for IEEE 802.16e LDPC has lower clock cycles and higher throughput.

Low-Complexity Multi-size Cyclic-Shifter for QC-LDPC Codes

  • Kang, Hyeong-Ju;Yang, Byung-Do
    • ETRI Journal
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    • v.39 no.3
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    • pp.319-325
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    • 2017
  • The decoding process of a quasi-cyclic low-density parity check code requires a unique type of rotator. These rotators, called multi-size cyclic-shifters (MSCSs), rotate input data with various sizes, where the size is the amount of data to be rotated. This paper proposes a low-complexity MSCS structure for the case when the sizes have a nontrivial common divisor. By combining the strong points of two previous structures, the proposed structure achieves the smallest area. The experimental results show that the area reduction was more than 14.7% when the proposed structure was applied to IEEE 802.16e as an example.

Experimental behaviours of steel tube confined concrete (STCC) columns

  • Han, Lin-Hai;Yao, Guo-Huang;Chen, Zhi-Bo;Yu, Qing
    • Steel and Composite Structures
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    • v.5 no.6
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    • pp.459-484
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    • 2005
  • In recent years, the use of steel tube confined concrete (STCC) columns has been the interests of many structural engineers. The present study is an attempt to study the monotonic and cyclic behaviours of STCC columns. For the monotonic behaviours, a series of tests on STCC stub columns (twenty one), and beam-columns (twenty) were carried out. The main parameters varied in the tests are: (1) column section types, circular and square; (2) tube diameter (or width) to thickness ratio, from 40 to 162, and (3) load eccentricity ratio (e/r), from 0 to 0.5. For the cyclic behaviours, the test parameters included the sectional types and the axial load level (n). Twelve STCC column specimens, including 6 specimens with circular sections and 6 specimens with square sections were tested under constant axial load and cyclically increasing flexural loading. Comparisons are made with predicted column strengths and flexural stiffness using the existing codes. It was found that STCC columns exhibit very high levels of energy dissipation and ductility, particularly when subjected to high axial loads. Generally, the energy dissipation ability of the columns with circular sections was much higher than those of the specimens with square sections. Comparisons are made with predicted column strengths and flexural stiffness using the existing codes such as AIJ-1997, AISCLRFD- 1994, BS5400-1979 and EC4-1994.