• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1053-1056
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• 2003

A distortion suppression technology for employing multiple inputs in 3n+1 type current mode Max circuit is proposed using the adjustment of transconductance. If the number of inputs in current mode Max circuit increases, the high frequency distortion in the output signal grows. In this paper, it has been disclosed that the distortion in the multiple input Max circuit is proportional to sum of parasitic capacitance in input terminals, to the derivative of the output signal and also to the inverse of transconductance of the common diode-connected transistor. The proposed idea is by employing as larger transconductance of the common diode-connected transistor as possible. The effectiveness of the proposed idea has been proved through the HSPICE simulation.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.865-868
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• 1993

This paper describes a simple random signal generator employing by CMOS analog technology in current mode. The system is a nonlinear dynamical system described by a difference equation, such as x(t＋1) = f(x(t)) , t = 0,1,2, ... , where f($.$) is a nonlinear function of x(f). The tent map is used as a nonlinear function to produce the random signals with the uniform distribution. The prototype is implemented by using transistor array devices fabricated in a mass product line. It can be easily realized on a chip. Uniform randomness of the signal is examined by the serial correlation test and the $\chi$2 test.

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.6
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• pp.1145-1152
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• 2019

In this paper, a low power current mode 12-bit ADC(: Analog to Digital Converter) is proposed to mix digital circuits and analog circuits with the advantages of low power consumption and high speed operation. The proposed 12 bit ADC is implemented by using 4-bit ADC in a cascade structure, so its power consumption can be reduced, and the chip area can be reduced by using a conversion current mirror circuit. The proposed 12-bit ADC is SK Hynix 350nm process, and post-layout simulation is performed using Cadence MMSIM. It operates at a supply voltage of 3.3V and the area of the proposed circuit is 318㎛ x 514㎛. In addition, the ADC shows the possibility of operating with low power consumption of 3.4mW average power consumption in this paper.

• Journal of IKEEE
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• v.4 no.2 s.7
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• pp.181-191
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• 2000

In this paper, two schemes of generating reference voltages using enhancement-mode MOS transistors and resistors are proposed. The first one is a voltage-mode scheme where the temperature compensation is made by summing a voltage component proportional to a threshold voltage and a voltage component proportional to a thermal voltage. In the second one, that is a current-mode scheme, the temperature compensation is made by summing a current component proportional to a threshold voltage and a current component proportional to a thermal voltage. The designed circuits have been simulated using a $0.65{\mu}m$ n-well CMOS process parameters. The voltage-mode circuit has a temperature coefficient less than $48.0ppm/^{\circ}C$ and a power-supply(VDD) coefficient less than 0.21%/V for a temperature range of $-30^{\circ}C{\sim}130^{\circ}C$ and a VDD range of $3V{\sim}12V$. The current-mode circuit has a temperature coefficient less than $38.2ppm/^{\circ}C$ and a VDD coefficient less than 0.8%/V for $-30^{\circ}C{\sim}130^{\circ}C\;and\; 4V{\sim}12V$. The power consumption of the voltage-mode and current-mode circuits are $27{\mu}W\;and\;65{\mu}W$ respectively for 5V and $30^{\circ}C$. Measurement results show that the voltage-mode reference circuit has a VDD coefficient less than 0.63%/V for $30^{\circ}C{\sim}100^{\circ}C$ and has a temperature coefficient less than $490ppm/^{\circ}C\;for\;3V{\sim}6V$. The proposed reference circuits are simple and thus easy to design. The proposed current-mode reference circuit can be designed to generate a wide range of reference voltages.

• Journal of Power Electronics
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• v.14 no.2
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• pp.217-225
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• 2014

This paper deals with the optimization of the driving techniques for the ZVT synchronous buck converter proposed in [1]. Two new gate drive circuits are proposed to allow this converter to operate by only one control signal as a 12V voltage regulator module (VRM). Voltage-driven method is applied for the synchronous rectifier. In addition, the control signal drives the main and auxiliary switches by one driving circuit. Both of the circuits are supplied by the input voltage. As a result, no supply voltage is required. This approach decreases both the complexity and cost in converter hardware implementation and is suitable for practical applications. In addition, the proposed SR driving scheme can also be used for many high frequency resonant converters and some high frequency discontinuous current mode PWM circuits. The ZVT synchronous buck converter with new gate drive circuits is analyzed and the presented experimental results confirm the theoretical analysis.

• Transactions on Electrical and Electronic Materials
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• v.11 no.1
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• pp.24-28
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• 2010

A simulation study of a current-mode direct current (DC)-DC buck converter is presented in this paper. The converter, with a fully integrated power module, is implemented by using sense method metal-oxide-semiconductor field-effect transistor (MOSFET) and bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. When the MOSFET is used in a current sensor, the sensed inductor current with an internal ramp signal can be used for feedback control. In addition, the BiCMOS technology is applied in the converter for an accurate current sensing and a low power consumption. The DC-DC converter is designed using the standard $0.35\;{\mu}m$ CMOS process. An off-chip LC filter is designed with an inductance of 1 mH and a capacitance of 12.5 nF. The simulation results show that the error between the sensing signal and the inductor current can be controlled to be within 3%. The characteristics of the error amplification and output ripple are much improved, as compared to converters using conventional CMOS circuits.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.11
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• pp.37-44
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• 2003

A distortion suppression technology for employing multiple inputs in 3n＋1 type current mode Max circuit is proposed using the adjustment of transconductance. If the number of input blocks of the current mode Max circuit increases, the high frequency distortion in the output signal grows. In this paper, it has been disclosed that the distortion in the multiple input Max circuit is proportional to such accumulated parasitic capacitance, to the derivative of the output signal and also to tile inverse of transconductance of the common diode-connected transistor. The proposed idea is by employing as larger transconductance of the common diode-connected transistor as possible. The effectiveness of the proposed idea has been proved through the HSPICE simulation for the current mode Max circuits with various numbers of input signals.

• The KIPS Transactions:PartA
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• v.11A no.2
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• pp.115-122
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• 2004

In this paper, the multiple-valued adders and multipliers are implemented by current-mode CMOS. First, we implement the 3-valued T-gate and the 4-valued T-gate using current-mode CMOS which have an effective availability of integrated circuit design. Second we implement the circuits to be realized 2-variable 3-valued addition table and multiplication table over finite fields $GF(3^2)$, and 2-variable 4-valued addition table and multiplication table over finite fields $GF(4^2)$ with the multiple-valued T-gates. Finally, these operation circuits are simulated under $1.5\mutextrm{m}$ CMOS standard technology, $15\mutextrm{A}$ unit current, and 3.3V VDD voltage Spice. The simulation results have shown the satisfying current characteristics. The 3-valued adder and multiplier, and the 4-valued adder and multiplier implemented by current-mode CMOS is simple and regular for wire routing and possesses the property of modularity with cell array. Also, since it is expansible for the addition and multiplication of two polynomials in the finite field with very large m, it is suitable for VLSI implementation.

• Journal of the Semiconductor & Display Technology
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• v.14 no.3
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• pp.57-60
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• 2015

Electric power in large devices is controlled by digital circuits, such as switching mode power supply. This kind of power circuits require accurate current sensor for power distribution. We studied characteristics of shunt resistor, which has many advantages for commercial application compared to Hall-effect current sensor. We applied ceramic package to the shunt resistor. Ceramic package has good thermal conductivity compared to plastic package, and this point is important for space requirement in Printed Circuit Board (PCB). Another advantage of the ceramic package is that surface mount technology (SMT) can be used for production. Our experimental results showed that the ceramic packaged resistor showed about 50% lower temperature than the plastic packaged one. Burning point and frequency characteristics are also discussed.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.6
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• pp.30-38
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• 1998

In this paper, a new CMOS current-mode integrator is proposed that can apply the basic building block of the low-voltage high frequency current-mode active filter. And tuning circuits that control the gain and unity gain frequency of them is designed. The proposed integrator is composed of the CMOS complementary circuit which can extend transconductance of an integrator. Therefore, the unity gain frequency which is determined transconductance and MOSFET gate capacitance can be expanded by the proposed integrator. The unity gain frequency of the proposed integrator is increased about two times larger than that of the conventional continuous-time integrator with NMOS-gm. And also, cut-off frequency and gain of the active filter can be controlled with the designed tuning circuit. From the result, we can reduce errors on fabrication. And then, 3rd-order low-pass active filter is designed as an application circuits. These results are verified by the small signal analysis and the 0.8$\mu\textrm{m}$ parameter HSPICE simulation.