• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2007.04a
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• pp.477-480
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• 2007

저전력 OFDM(orthogonal frequency division multiplexing) 시스템용 FFT(Fast-Fourier-Transform) LSI를 저전력 동작을 시키기 위해서 FFT LSI는 current-mode 회로로 구현되었다. Current-mode FFT LSI에서, VIC(Voltage-to-current converter)는 입력 전압 신호를 전류로 바꾸는 first main device이다. 저전력 OFDM을 위해 FFT LSI와 VIC가 한 개의 칩과 결합되는 것을 고려하면, VIC는 전력 손실은 낮고, VIC와 FFT LSI 사이에서의 DC offset 전류는 최소인 작은 크기의 chip으로 설계되어야 한다. 본 논문에서는 새로운 VIC를 제안한다. 선형 동작구간을 넓히고 DC offset 전류를 대폭 감소하는 방법을 제시하였다. VIC는 0.35[um] CMOS process로 구현되었으며, 시뮬레이션 결과에 따르면 제안된 VIC는 current-mode FFT LSI와 0.1[uA] 미만의 매우 작은 DC offset 전류, 1.4[V]의 넓은 선형구간을 갖으며, 저전력으로 동작한다.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2007.04a
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• pp.469-472
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• 2007

최근 많은 광대역 유무선 통신 응용분야에서 OFDM(Orthogonal Frequency Division Multiplexing) 방식을 표준기술로 채택하고 있다 OFDM 방식의 고속 무선 데이터 통신를 위한 FFT 프로세서는 일반적으로 DSP(Digital Signal Processing)로 구현되었으나, 큰 전력 소비를 필요로 한다. OFDM의 단점인 전력문제를 보안하기 위해서 Current-mode FFT LSI가 제안되었다. 본 논문에서는 Current-mode FFT LSI의 구현을 위한 저전력 IVC를 설계하였다. 설계된 IVC는 FFT Block의 출력이 $13.65{\mu}A$ 이상일 때에 3V 이상의 전압을 출력하고, FFT Block의 출력이 $0.15{\mu}A$ 이하일 때에 0.5V 이하의 전압을 출력한다. 그리고 IVC의 총 소모전력은 약 1.65mW이다. $0.35{\mu}A$ 공정에서의 저전력 IVC를 설계함으로서, $0.35{\mu}A$ 공정에서의 Current-mode FFT LSI의 설계가 가능해졌다. 저전력 OFDM 통신용 Current-mode FFT LSI는 무선통신의 발전에 기여할 것으로 전망한다.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.1
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• pp.39-45
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• 2009

OFDM is used for achieving a high-speed data transmission in mobile wireless communication systems. Conventionally, fast Fourier transform that is the main signal processing of OFDM is implemented using digital signal processing. The DSP FFT LSI requires large power consumption. Current-mode FFT LSI with analog signal processing is one of the best solutions for high speed and low power consumption. However, for the operation of current-mode FFT LSI that has the structure of parallel-input and parallel-output, current-mode serial-to-parallel and parallel-to-serial converter are indispensable. We propose a novel current-mode SPC and PSC and full chip simulation results agree with experimental data. The proposed current-mode SPC and PSC promise the wide application of the current-mode analog signal processing in the field of low power wireless communication LSI.

• The Journal of the Korea institute of electronic communication sciences
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• v.3 no.2
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• pp.86-92
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• 2008

Othogonal Frequency Division Multiplexing(OFDM) has been taken notice of 4th generation communication method because it has a merit of high data rate(HDR). To realize HDR communication, The OFDM a s high efficient Fast-Fourier-Transform (FFT)/Inversion FFT (IFFT) processor. Currently OFDM is realized by Digital Signal Processor(DSP) but it consumes a lot of Power. Therefore, current-mode FFT LSI has been proposed for compensation of this demerit. In this paper, we propose IVC for current-mode FFT LSI. From the simulation result, the output value of IVC is more than 3V when the value of FFT Block output is more than $7.35{\mu}A$. The output value of IVC is lower than 0.5V when the value of FFT Block output is lower than $0.97{\mu}A$. Designed IVC Low-power Current mode FFT LSI will contribute to the operation of current-mode FFT LSI and the development of next generation wireless communication systems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.10A
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• pp.776-783
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• 2009

Current-cut circuit is an effective method to obtain low power consumption in wireless communication systems as high speed OFDM. For the operation of current-mode FFT LSI with analog signal processing essentially requires current-mode serial-to-parallel/parallel-to-serial converter with multi input and output structure. However, the Hold-mode operation of current-mode serial-to-parallel/parallel-to-serial converter has unnecessary power consumption. We propose a novel current-mode serial-to-parallel/parallel-to-serial converter with current-cut circuit and full chip simulation results agree with experimental data of low power consumption. The proposed current-mode serial-to-parallel/parallel-to-serial converter promise the wide application of the current-mode analog signal processing in the field of low power wireless communication LSI.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.4
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• pp.89-95
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• 2008

In the maritime communication, Orthogonal Frequency Division Multiplexing (OFDM) communication terminal should be operated with low power consumption, because the communication should be accomplished in the circumstance of disaster. Therefore, Low power FFT processor is required to be designed with current mode signal processing technique than digital signal processing. Current- to-Voltage Converter (IVC) is a device that converts the output current signal of FFT processor into the voltage signal. In order to lessen the power consumption of OFDM terminal, IVC should be designed with low power design technique and IVC should have wide linear region for avoiding distortion of signal voltage. To design of one-chip of the FFT LSI and IVC, IVC should have a small chip size. In this paper, we proposed the new IVC with wide linear region. We confirmed that the proposed IVC operates linearly within 0.85V to 1.4V as a function of current-mode FFT output range of -100~100[uA]. Designed IVC will contribute to realization of low-power maritime data communication using OFDM system.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2007.04a
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• pp.485-488
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• 2007

최근 Analog Sampled-Data 신호처리를 위하여 주목되고 있는 SI(Switched-Current) circuit은 저전력 동작을 하는 장점이 있지만, 반면에 SI circuit에서의 기본 회로인 Current Memory는 Charge Injection에 의한 Clock Feedthrough이라는 치명적인 단점을 갖고 있다. 따라서 본 논문에서는 Current Memory의 문제점인 Clock Feedthrough의 일반적인 해결방안으로 Dummy Switch의 연결을 검토하였고, Austria Mikro Systeme(AMS)에서 $0.35{\mu}m$ CMOS process BSIM3 Model로 제작하기 위하여 Current Memory의 Switch MOS와 Dummy Switch MOS의 적절한 Width을 정의하여야 하므로, 그 값을 도출하였다. Simulation 결과, Switch의 Width는 $2{\mu}m$, Dummy Switch의 Width는 $2.35{\mu}m$로 정의될 수 있음을 확인하였다.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.19 no.8
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• pp.116-121
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• 2005

To realize the tap coefficient of a finite impulse response(FIR) filter or the twiddle factor of a fast Fourier transform(FFT) using a current-mode analog circuit, a high accurate current-attenuator circuit is needed This paper introduces an accuracy enhancement technique in the current-mode signal processing. First of all, the DC of set-current error in a conventional current-attenuator using a gate-ratioed orient mirror circuit is analyzed and then, the current-attenuator circuit with a negligibly small DC offset-current error is introduced. The circuit consists of N-output current mirrors connected in parallel with me another. The output current of the circuit is attenuated to 1/N of the input current. On the basis of the Kirchhoff current law, the current scale ratio is determined simply by the number of the current mirrors in the N-current mirrors connected in parallel. In the proposed current-attenuator circuit the scale accuracy is limited by the ac gain error of the current mirror. Considering that a current mirror has a negligibly small ac gain error, the attainable maximum scale accuracy is theoretically -80[dB] to the input current.