• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.7 no.6
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• pp.63-69
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• 2008

Reconfigurable RF one-chip solutions have been researched with the objective of designing for smaller-sized and more economical RF transceiver and it can be applied to a vehicular wireless terminal. The proposed voltage-controlled oscillator satisfies the targeted frequency range ($4.2{\sim}5.4\;GHz$) and the frequency planning which correspond to the standards such as CDMA(IS-95), PCS, GSM850, EGSM, WCDMA, WLAN, Bluetooth, WiBro, S-DMB, DSRC, GPS, and DVB-H/DMB-H/L(L Band). In order to improve phase noise performance, PMOS is adopted in the cross-coupled pair, the tail current source and MOS varactor in this VCO and differential-typed switching is proposed in capacitor array. Based on the measurement results, a total power dissipation is $5.3{\sim}6.0\;mW$ at 1.8 V power supply voltage. The oscillator is tuned from 4.05 to 5.62 GHz; The tuning range is 33%. The phase noise is -117.16 dBc/Hz at 1 MHz offset frequency and the FOM (Figure Of Merit) is $-180.84{\sim}-180.5$.

• The Transactions of the Korea Information Processing Society
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• v.7 no.1
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• pp.235-244
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• 2000

This paper presents a low power PLL based clock geneator circuit for microprocessors. It generates 32MHz${\sim}$1GHz clocks and can be integrated inside microprocessor chips. A high speed D Flip-Flop is designed using dynamic differential latch and a new Phase Frequency Detector(PFD) based on this FF is presented. The PFD enjoys low error characteristics in phase sensitivity and the PLL using this PFD has a low phase error. To improve the linearity of voltage controlled oscillator(VCO) in PLL, the voltage to current converter and current controlled oscillator combination is suggested. The resulting PLL provides wide lock range and extends frequency of generated clocks over 1 GHz. The clock generator is designed by using $0.65\;{\mu}m$ CMOS full custom technology and operates with $11\;{\mu}s$ lock-in time. The power consumption is less than 20mW.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.145-148
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• 2015

In this letter, we present a new linearization method for a voltage controlled oscillator (VCO)-based quantizer in an analog-to-digital converter (ADC). The nonlinearity of the VCO generates unwanted harmonic spurs and reduces the signal-to-noise and distortion ratio (SNDR) of the VCO-based quantizer. This letter suggests a frequency-to-current feedback method to effectively suppress harmonic distortion. The proposed method decreases the harmonic spurs by more than 53 dB. And a VCO-based quantizer employing the proposed linearization method achieves a high SNDR of 74.1 dB.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.4
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• pp.891-896
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• 2011

This paper describes the differential voltage-to-frequency converter which is realized current conveyor circuits. The output frequency of the differential voltage-to-frequency converter is proportional to the difference of two input voltages. The designed circuit is simulated by HSPICE. The range of input voltage difference is from several volts to several milli-volts. From the simulation results the error is less than from -1.9% to +1.8% compared to the calculated values.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.8
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• pp.41-46
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• 2012

A quadrature voltage controlled oscillator(QVCO) for X-band is presented in this paper. The QVCO has fabricated in Charted $0.13{\mu}m$ CMOS process. The QVCO consists of two cross-coupled differential VCO and two differential buffers. The QVCO is controlled by 4 bit of capacitor bank and control voltage of varactor. To have a linear quality factor of varactors, voltage biases of varactors are difference. The QVCO generates frequency tuning range from 6.591 GHz to 8.012 GHz. The phase noise is -101.04 dBc/Hz at 1MHz Offset when output frequency is 7.150 GHz. The supply voltage is 1.5 V and core current 6.5-8.5 mA.

• Journal of IKEEE
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• v.11 no.3
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• pp.122-128
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• 2007

Sinusoidal voltage-controlled oscillators (VCOs) based on Colpitts and Hartley oscillators are presented. They consist of a LC parallel-tuned circuit connected in a negative-feedback loop with an OTA-R amplifier and two diode limiters, where the inductor is simulated one realized with temperature-stable linear operational transconductance amplifiers (OTAs) and a grounded capacitor. Prototype VCOs are built with discrete components. The Colpitts VCO exhibits less than 1% nonlinearity in its current-to-frequency transfer characteristic from 4.2 to 21.7 MHz and ${\pm}$95 ppm/$^{\circ}C$ temperature drift of frequency over 0 to $70^{\circ}C$. The total harmonic distortion (THD) is as low as 2.92% with a peak-to-peak amplitude of 0.7 V for a frequency-tuning range of 10.8-32 MHz. The Hartley VCO has the temperature drift and THD of two times higher than those of the Colpitts VCO.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2000.11a
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• pp.111-115
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• 2000

In this paper, a prototype electronic ballast for 400W MH lamps is designed and implemented. To remove the phenomenon of acoustic resonance in the lamp being operated at high frequency, a spread spectrum method is employed on the ballast. Half-bridge resonant inverter, voltage-controlled-oscillator and PFC are used and the current of lamp is controlled with taking into account the voltage of lamp. The ballast is built with analog OP-amps and MOSFETs. The experimental results show the good performance as PF 0.93, ATHD 0.14, Ballast loss 22W at output 400W.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.7 no.4
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• pp.195-199
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• 2014

A bridge resistance deviation-to-period (BRD-to-P) converter is presented for interfacing resistive biosensors. It consists of a linear operational transconductance amplifier (OTA) and a current-controlled oscillator (CCO) formed by a current-tunable Schmitt trigger and an integrator. The free running period of the converter is 1.824 ms when the bridge offset resistance is $1k{\Omega}$. The conversion sensitivity of the converter amounts to $3.814ms/{\Omega}$ over the resistance deviation range of $0-1.2{\Omega}$. The linearity error of the conversion characteristic is less than ${\pm}0.004%$.

• Proceedings of the KIEE Conference
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• 2001.11a
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• pp.96-99
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• 2001

In this paper, we present the simulation results of the multi-layer VCO(Voltage Controlled Oscillator), which is composed of the resonator, the oscillator and the buffer circuit. using EM simulator and nonlinear RF circuit simulator. EM simulator is used for obtaining the EM(Electromagnetic) characteristics of the conductor pattern as well as designing the multi-layer VCO. Obtained EM characteristics were used as real components in nonlinear RF circuit simulation. Finally the overall VCO was simulated using the nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was DuPont 951AT, which will be applied for LTCC process. The structure is constructed with 4 conducting layer. Simulated results showed that the output level was about 4.5[dBm], the phase noise was -104[dBc/Hz] at 30[kHz] offset frequency, the harmonics -8dBc, and the control voltage sensitivity of 30[MHz/V] with a DC current consumption of 9.5[mA]. The size of VCO is $6{\times}9{\times}2mm$(0.11[cc]).

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.6
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• pp.492-498
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• 2002

In this paper, we present the simulation results of multi-layer VCO(voltage controlled oscillator), which is composed of resonator, oscillator, and buffer circuit, using EM simulator and nonlinear RF circuit simulator. EM simulator is used for obtaining the EM(Electromagnetic) characteristics of conductor pattern as well as designing the multi-layer VCO. Obtained EM characteristics were used as real components in nonlinear RF circuit simulation. Finally the overall VCO was simulated by the nonlinear RF circuit simulator. The material for the circuit pattern was Ag and the dielectric was Dupont 951AT, which will be applied for LTCC process. The structure of multi-layer VCO is constructed with 4 conducting layer. Simulated results showed that the output level was about 4.5 [dBm], the phase noise was -104 [dBc/Hz] at 30 [kHz] offset frequency, the harmonics -8 dBc, and the control voltage sensitivity of 30 [MHz/V] with a DC current consumption of 9.5 [mA]. The size of VCO is $6{\times}9{\times}2 mm$(0.11 [cc]).