• Title/Summary/Keyword: Current offset

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Counter-Current Gas-Liquid Two-Phase Flow in Narrow Rectangular Channels with Offset Strip Fins (휜이 있는 협소 사각 유로에서 대향류 기/액 2상 유동)

  • Sohn, B.H.;Kim, B.J.;Jeong, S.
    • Proceedings of the KSME Conference
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    • 2001.06e
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    • pp.229-234
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    • 2001
  • An adiabatic counter-current vertical two-phase flow of air and water in narrow rectangular channels with offset strip fm was investigated experimentally. Tests were systematically performed with downward liquid superficial velocities and upward gas velocities covering 0 to 0.06 m/s and 0 to 2.5 m/s ranges, respectively. Two-phase flow regimes were classified by examining the video images of flow patterns in transparent test sections of 760 mm long and 100 mm wide channel with gaps of 3.0 and 5.0 mm. The channel average void fraction was measured by the quick-closing valve method. Unlike the flow regimes in the channels without fin, where bubbly, slug, chum, and annular flow were identified, only bubbly and chum flow regimes were found for the channels with offset strip fin. However the existence of fin in the channels showed negligible effects on the void fraction. Instead counter-current flow limitations were found to happen at lower air superficial velocity once offset strip fin was introduced in narrow rectangular channels.

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Self-Aligned Offset Poly-Si TFT using Photoresist reflow process (Photoresist reflow 공정을 이용한 자기정합 오프셋 poly-Si TFT)

  • Yoo, Juhn-Suk;Park, Cheol-Min;Min, Byung-Hyuk;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 1996.07c
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    • pp.1582-1584
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    • 1996
  • The polycrystalline silicon thin film transistors (poly-Si TFT) are the most promising candidate for active matrix liquid crystal displays (AMLCD) for their high mobilities and current driving capabilities. The leakage current of the poly-Si TFT is much higher than that of the amorphous-Si TFT, thus larger storage capacitance is required which reduces the aperture ratio fur the pixel. The offset gated poly-Si TFTs have been widely investigated in order to reduce the leakage current. The conventional method for fabricating an offset device may require additional mask and photolithography process step, which is inapplicable for self-aligned source/drain ion implantation and rather cost inefficient. Due to mis-alignment, offset devices show asymmetric transfer characteristics as the source and drain are switched. We have proposed and fabricated a new offset poly-Si TFT by applying photoresist reflow process. The new method does not require an additional mask step and self-aligned ion implantation is applied, thus precise offset length can be defined and source/drain symmetric transfer characteristics are achieved.

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Comparative Analysis of Offset Voltage PWM and $V_{max}-V_{mid}$ PWM Method for 3 Phase Matrix Converter (3상 매트릭스 컨버터에 사용되는 옵셋전압 PWM 방법과 $V_{max}-V_{mid}$ PWM 방법의 비교분석)

  • Cha, Han-Ju;Kim, Woo-Jung
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.2
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    • pp.285-291
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    • 2009
  • In this paper, comparative analysis of offset voltage PWM method and $V_{max}-V_{mid}$ PWM method for three-phase matrix converter is addressed by using a simple analytical and graphical method. Offset voltage PWM method calculates PWM patterns in terms of offset voltage and variable slope of carrier, and it simplifies matrix converter modulation algorithm significantly. $V_{max}-V_{mid}$ PWM method generates patterns by using two phases and maintaining a remaining phase to base phase, and it is implemented in the industrial products. The most important performance criterion of modulation method is a magnitude of current ripples and it is analytically modelled. The graphical illustration of theses complex multivariable functions make per-carrier cycle and per fundamental cycle behavior of two PWM methods understood. Two modulation methods are analysed with the analytical formulas and graphics, and the analysis shows offset voltage PWM method is superior to $V_{max}-V_{mid}$ PWM method with respect to input current ripples and output voltage ripples.

Analysis and Compensation of Current Measurement Errors in a Doubly Fed Induction Generator

  • Son, Yung-Deug;Im, Won-Sang;Park, Han-Seok;Kim, Jang-Mok
    • Journal of Electrical Engineering and Technology
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    • v.9 no.2
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    • pp.532-540
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    • 2014
  • It is necessary to measure the current of rotor for controlling the active and reactive power generated by the stator side of the doubly fed induction generator (DFIG) system. There are offset and scaling errors in the current measurement. The offset and scaling errors cause one and two times current ripples of slip frequency in the synchronous reference frame of vector control, respectively. This paper proposes a compensation method to reduce their ripples. The stator current is variable according to the wind force but the rotor current is almost constant. Therefore input of the rotor current is more useful for a compensation method. The proposed method adopts the synchronous d-axis current of the rotor as the input signal for compensation. The ripples of the measurement errors can be calculated by integrating the synchronous d-axis stator current. The calculated errors are added to the reference current of rotor as input of the current regulator, then the ripples are reduced. Experimental results show the effectiveness of the proposed method.

Digital Filter Design for Removing Exponentially Decaying DC-Offset Component from Relaying Signal (계통사고시 지수함수 형태로 감소하는 DC-Offset 성분을 계전신호에서 제거하는 Digital Filter 디자인)

  • Kang, Sang-Hee;Kim, Nam-Ho;Kang, Yong-Cheol;Kim, Il-Dong;Park, Jong-Geun
    • Proceedings of the KIEE Conference
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    • 1992.07a
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    • pp.59-62
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    • 1992
  • Power system fault transient signals are highly distorted due to the presence of high frequency components in the voltage and current signals and an exponentially decaying dc-offset component in the current signals. Modern protective relays have to make reliable fast decisions about the nature of a fault in the presence of such transients. To use a dc-offset removing filter makes relay algorithms much fast and reliable for detecting a fault. In this paper, several dc-offset removing filters are described, and characteristics of them are compared.

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Advanced Distance Relaying of on a Double Circuit Transmission Line (병행 2회선 송전선로의 개선된 거리계전기법)

  • Park, Chul-Won
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.29 no.8
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    • pp.23-31
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    • 2015
  • This paper proposes an advanced distance relaying based on the DC offset removal filter to minimize the effects of DC offset on a double circuit transmission line. The proposed DC offset removal filter uses only one cycle of data for phasor extraction computation, which does not need to preset the time constant of the DC offset component. This proposed distance relaying uses not only the residual current of the faulted circuit but also mutual current of the healthy adjacent circuit. A series of off-line test results using ATP simulation data show the effectiveness of the an advanced distance relaying.

A DC-Offset Elimination Algorithm Based on an AR Model (AR모델을 이용한 직류 옵셋 성분 제거 알고리즘)

  • Chang Soo Young;Lee Dong Gyu;Kang Sang Hee
    • Proceedings of the KIEE Conference
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    • summer
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    • pp.289-291
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    • 2004
  • ln this paper, A dc-offset elimination novel algorithm based on an An model is proposed. The algorithm can eliminate dc-offset rapidly than other algorithms. The signal of fault current can be presented as a linear equation combined sinusoidal with exponential signals. Then, the linear equation can be presented an auto-regressive(AR) model and do-offset can be calculated by the equation of AR model. So it is possible to be removed the dc-offset from the original current signal. Performance evaluation of the algorithm was tested on condition that A-phase ground fault on 154kV 25km overhead transmission line.

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Adaptive offset decision of current sensor (적응형 전류센서 offset 보정량 검출)

  • Lee, Yoon-Hyung;Han, Sang-Whi
    • Proceedings of the Korea Information Processing Society Conference
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    • 2012.11a
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    • pp.438-440
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    • 2012
  • 본 논문은 EPS ECU 에 사용되고 있는 전류센서의 offset 결정에 대해 효율적인 방법을 제시한다. 센서의 offset 은 EPS 시스템에서 모터의 토크리플을 야기하기 하므로, 토크리플을 줄이기 위해 offset 을 보정하여 모터를 제어하게 된다. 일반적으로 EPS ECU 에 대해 offset 보정 방법은 ECU 생산시 센서의 offset 값을 측정하여 EEPROM 에 기록하고, 모터 제어시 활용한다. 이러한 방식은 ECU 생산의 cycle time 을 늘릴 뿐만 아니라, 센서 및 주변 회로의 노후로 인해 MCU 의 입력으로 들어오는 offset 값의 변화에 대해 대응할 수 없는 한계를 가진다. 언급된 문제를 보완하기 위해 본 논문은 ECU 생산시 offset 을 EEPROM 에 기록하는 것이 아니라 ECU 가 ON 때마다 센싱값을 정확하게 취득하여 offset 값을 선정하고 '강인한 오차 기준' 함수를 사용하여 노이즈의 영향을 줄이는 방법을 제시한다.

A Study on Current Ripple Reduction Due to Offset Error in SRF-PLL for Single-phase Grid-connected Inverters (단상 계통연계형 인버터의 SRF-PLL 옵셋 오차로 인한 전류 맥동 저감에 관한 연구)

  • Hwang, Seon-Hwan;Hwang, Young-Gi;Kwon, Soon-Kurl
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.28 no.11
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    • pp.68-76
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    • 2014
  • This paper presents an offset error compensation algorithm for the accurate phase angle of the grid voltage in single-phase grid-connected inverters. The offset error generated from the grid voltage measurement process cause the fundamental harmonic component with grid frequency in the synchronous reference frame phase lock loop (PLL). As a result, the grid angle is distorted and the power quality in power systems is degraded. In addition, the dq-axis currents in the synchronous reference frame and phase current have the dc component, first and second order ripples compared with the grid frequency under the distorted grid angle. In this paper, the effects of the offset and scaling errors are analyzed based on the synchronous reference frame PLL. Particularly, the offset error can be estimated from the integrator output of the synchronous reference frame PLL and compensated by using proportional-integral controller. Moreover, the RMS (Root Mean Square) function is proposed to detect the offset error component. The effectiveness of the proposed algorithm is verified through simulation and experiment results.

Diminution of Current Measurement Error in Vector Controlled AC Motor Drives

  • Jung Han-Su;Kim Jang-Mok;Kim Cheul-U;Choi Cheol;Jung Tae-Uk
    • Journal of Power Electronics
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    • v.5 no.2
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    • pp.151-159
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    • 2005
  • The errors generated from current measurement paths are inevitable, and they can be divided into two categories: offset error and scaling error. The current data including these errors cause periodic speed ripples which are one and two times the stator electrical frequency respectively. Since these undesirable ripples bring about harmful influences to motor driving systems, a compensation algorithm must be introduced to the control algorithm of the motor drive. In this paper, a new compensation algorithm is proposed. The signal of the integrator output of the d-axis current regulator is chosen and processed to compensate for the current measurement errors. Usually the d-axis current command is zero or constant to acquire the maximum torque or unity power factor in the ac drive system, and the output of the d-axis current regulator is nearly zero or constant as well. If the stator currents include the offset and scaling errors, the respective motor speed produces a ripple related to one and two times the stator electrical frequency, and the signal of the integrator output of the d-axis current regulator also produces the ripple as the motor speed does. The compensation of the current measurement errors is easily implemented to smooth the signal of the integrator output of the d-axis current regulator by subtracting the DC offset value or rescaling the gain of the hall sensor. Therefore, the proposed algorithm has several features: the robustness in the variation of the mechanical parameters, the application of the steady and transient state, the ease of implementation, and less computation time. The MATLAB simulation and experimental results are shown in order to verify the validity of the proposed current compensating algorithm.