• Proceedings of the KIPE Conference
• /
• 2001.07a
• /
• pp.151-154
• /
• 2001

This paper propose a new active common-mode voltage damper circuit that is capable of suppressing a common-mode voltage produced in the PWM VSI. The new active common mode voltage damper is consisted of a half-bridge inverter and a common mode transformer with a blocking capacitor. Principle of the active common mode damper is as follow; by applying the compensation voltage which has the same amplitude and opposite polarity to the PWM inverter system. So, common mode voltage and high frequency leakage current can be reduced. Simulated and experimental results show that common-mode voltage damper makes contributions to reducing a high frequency leakage current and common-mode voltage.

• Proceedings of the KIEE Conference
• /
• 1998.07f
• /
• pp.1940-1943
• /
• 1998

A new PWM rectifier which offers a unity power factor is proposed. The circuit has same inductance as the conventional boosting type PWM rectifier in powering mode, but the inductance is splitted to 2 part in freewheeling mode. So the period of freewheeling mode is shorter than that of conventional boosting type PWM rectifier, and discontinuous input current is obtained in wide duty range. Therefore the proposed PWM rectifier accomplishs a unity power factor in wide range of duty ratio and boosting factor. And the conventional boosting type PWM rectifier has poor power factor near the unity boosting ratio, the proposed PWM rectifier improves this problem. The mathmatical analysis are presented and experimental results are given.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.7 no.2
• /
• pp.94-97
• /
• 2007

The desin and implementation of a CMOS analog integrated circuit that provides dual-mode modulations, PWM for active clamp reset converter and PFM for LLC resonant converter, is described. The proposed controller is capable of implementing programmable soft start and current-mode control with compensating ramp for PWM and frequency shifting soft start for PFM. Also it provides delay time for both modes. PWM mode is implemented by active clamp reset converter and PFM mode is implemented by LLC resonant convereter, respectively. The chip is fabricated using the 0.6um high voltage CMOS process.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.67 no.12
• /
• pp.1729-1734
• /
• 2018

Recently, interest in environmentally friendly transportation systems has been increasing, and study on railway systems has been aggressively conducted. Therefore, lots of studies have been done in railway advanced countries to improve performance of PWM converter. The research on the PWM converter for railway vehicle was mainly carried out on the converter mounted on railway vehicle such as the high-speed railway and metropolitan railway. In also, a lot of study has been carried out to improve converter performance installed in the ground. The high-capacity transform used in this paper converted from AC 22.9kV to AC 590V. The converter changed from AC 590V to DC 950V. In general, in the case of rectifier, the DC power supply system has a negative impact on inverter control characteristics because it can not avoid the pulsating component. In this study, it was performed current control for high-capacity converter using Matlab Simulink. The PWM converter is normally performed through the voltage and current at starting mode, powering mode, and braking mode. In the light-load test and the on-line test, we have studied for the PWM converter characteristics. Using this research, we have founded that the converter has excellent performance.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.19 no.6
• /
• pp.488-493
• /
• 2014

This paper presents a carrier-based pulse-width modulation(PWM) method for reducing the common-mode voltage of a three-level four-leg converter. The idea of the proposed PWM method is intuitive and easy to be implemented in digital signal processor-based converter control systems. On the basis of the analysis of space-vector PWM(SVPWM) and sinusoidal PWM(SPWM) switching patterns, the fourth leg pole voltage of the three-phase converter called "f leg pole voltage" is manipulated to reduce the common-mode voltage. To synthesize f leg pole voltage for the suppression of the common-mode voltage, positive and negative pole voltage references of f leg are calculated. An offset voltage is also deduced to prevent the distortion of a, b, and c phase voltages. The feasibility of the proposed PWM method is verified by simulation and experimental results. The common-mode voltage of the proposed PWM method in peak-to-peak value is 33% in comparison with that of the conventional SVPWM method. The transition number of the common-mode voltage is also reduced to 25%.

• Proceedings of the KIEE Conference
• /
• 2006.07b
• /
• pp.1209-1210
• /
• 2006

This paper presents a single phase high power factor PWM boost rectifier featuring soft commutat -ion of the active switches at zero current. It incorporates the most desirable properties of conventional PWM and soft switching resonant techniques. The input current shaping is achieved with average current mode control and continuous inductor current mode. This new PWM converter provides zero current turn on and turn off of the active switches, and it is suitable for high power applications employing IGBT's. The principle of operation, the theoretical analysis, a design example, and experi -mental results from a laboratory prototype rated at 1.6[kW] with 400[Vdc] output voltage are presented. The measured efficiency and the power factor were 96.2[%] and 0.99[%], respectively, with an input current THD equal to 3.94[%], for an input voltage with THD equal to 3.8[%], at rated load.

• Proceedings of the KIEE Conference
• /
• 2003.07b
• /
• pp.1169-1171
• /
• 2003

This paper presents a 1.6[kW]class single phase high power factor(HPF) pulse width modulation(PWM) boost rectifier featuring soft commutation of the active switches at zero current. It incorporates the most desirable properties of conventional PWM and soft switching resonant techniques. The input current shaping is achieved with average current mode control and continuous inductor current mode. This new PWM converter provides zero current turn on and turn off of the active switches, and it is suitable for high power applications employing insulated gate bipolar transistors(IGBT'S). The principle of operation, the theoretical analysis, a design example, and experimental results from laboratory prototype rated at 1.6[kW] with 400[Vdc] output voltage are presented. The measured efficiency and the power factor were 96.2[%] and 0.99[%], respectively, with an input current Total Harmonic Distortion(THD) equal to 3.94[%], for an input voltage with THD equal to 3.8[%], at rated load.

• Journal of Power Electronics
• /
• v.7 no.3
• /
• pp.246-256
• /
• 2007

In this paper, a novel type auxiliary active edge resonant snubber assisted zero current soft switching pulse modulation Single-Ended Push Pull (SEPP) series load resonant inverter using IGBT power modules is proposed for cost effective consumer high-frequency induction heating (IH) appliances. Its operating principle in steady state is described by using each switching mode's equivalent operating circuits. The new multi resonant high-frequency inverter with series load resonance and edge resonance can regulate its high frequency output power under a condition of a constant frequency zero current soft switching (ZCS) commutation principle on the basis of the asymmetrical pulse width modulation (PWM) control scheme. Brand-new consumer IH products using the proposed ZCS-PWM series load resonant SEPP high-frequency inverter using IGBTs is evaluated and discussed as compared with conventional high-frequency inverters on the basis of experimental results. In order to extend ZCS operation ranges under a low power setting PWM as well as to improve efficiency, the high frequency pulse density modulation (PDM) strategy is demonstrated for high frequency multi-resonant inverters. Its practical effectiveness is substantially proved from an application point of view.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.24 no.1
• /
• pp.56-61
• /
• 2019

In this study, a reduction method of leakage current in a three-level photovoltaic power-conditioning system (PCS) is proposed and verified by simulation and experiment. Leakage current generation is analyzed through an equivalent model of the common mode voltage considering a significant parasitic capacitance existing between the photovoltaic array and ground. A leakage current reduction method using pulse-width modulation (PWM) method is also proposed, and a 10-kW three-level photovoltaic PCS simulation and experiment is performed with a $1{\mu}F$ parasitic capacitor based on 100 nF/kW. The proposed method using the PWM method is verified to reduce the leakage current by 73% compared with the conventional PWM method.

• 전자공학회논문지 IE
• /
• v.47 no.2
• /
• pp.13-20
• /
• 2010

This paper describes a current mode PWM DC-DC converter IC for battery charger and supply power converter for portable electronic devices. The maximum supply voltage of IC is 40[V] and 2.8[V]~330[V] DC input power is converted to higher or programmed DC voltage according to external resistor ratio or wire winding ratio of transformer. The maximum supply output current is 3[A] over and voltage error of output node is within 3[%]. The whole circuit needed current mode PWM DC-DC converter circuit is designed. The package dimensions and number of external parts are minimized in order to get a smaller hardware size. The power consumption is smaller then 1[mW] at stand by period with supply voltage of 3.6[V] and maximum energy conversion efficiency is about 86[%]. This device has been designed in a 0.6[um] double poly, double metal 40[V] CMOS process and whole chip size is 2100*2000 [um2].