• Journal of information and communication convergence engineering
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• v.8 no.1
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• pp.103-106
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• 2010

In this paper, the delay times were evaluated to develop highly reliable time-to-digital converter(TDC) in analog and digital delay element structures. The delay element can be designed by using current source or inverter. In case of using inverter, the number of inverter has to be controlled to adjust the delay time. And in case of using current source, the current for charging and discharging is controlled. When the current source is used the delay time of the delay element is not sensitive with varying the channel width of CMOS. However, when the inverter is used the delay time is directly related to the channel width of CMOS. Therefore to obtain good reliability in TDC circuit the delay element using current source is more stable compared to inverter in the viewpoint of the variation of fabrication process.

• Journal of Power Electronics
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• v.12 no.5
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• pp.715-722
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• 2012

New discrete time domain models for the peak current controlled (PCC) power LED drivers in continuous conduction mode include for the first time the effects of the time delay in the pulse-width-modulator. Realistic amounts of time delay are found to have significant effects on the average output LED current and on the critical inductor value at the boundary between the two conduction modes. Especially, the time delay can provide an accurate LED current for the PCC buck converter with a wide input voltage. The models can also predict the critical inductor value at the mode boundary as functions of the input voltage and the time delay. The overshoot of the peak inductor current due to the time delay results in the increase of the average output current and the reduction of the critical inductor value at the mode boundary in all converters. Experimental results are presented for the PCC buck LED driver with constant-frequency controller.

• The Transactions of the Korean Institute of Power Electronics
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• v.11 no.5
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• pp.426-430
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• 2006

This paper deals with a novel utilization method of the predicted current in the high performance PI current controller with a control time delay. The inevitable error of the predicted current in the linear servo drive using a permanent magnet linear synchronous motor is analyzed and a modified cross-coupling decoupling synchronous frame PI current controller is proposed in order to improve the current control response under both the control time delay and the inevitable current prediction error. Simulation and experimental results show that the proposed current controller has an improved current control performance under both the control time delay and the inevitable current prediction error in the servo drive system.

• Journal of Institute of Control, Robotics and Systems
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• v.9 no.12
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• pp.1001-1008
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• 2003

A time-delay compensation method for vector control system is proposed that can compensate for voltage and current distortions resulting from a time delay in the overall system due to the low pass filter, hysteresis control inverter, microprocessor program computation time, and so on. The proposed scheme estimates the time delay using the difference between the Q-axis stator current command and the time-delayed actual Q-axis stator current in a synchronous reference frame, then compensates the time delay in the voltage and current using the angular displacement of a DQ transformation. Accordingly, the proposed scheme can accurately compensate for the time delay related to the overall system, thereby significantly improving the performance of the vector control system, as verified by simulation and experiment.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.1-3
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• 2006

This paper deals with a novel utilization method of the predicted current in the high performance PI current controller with a control time delay. The inevitable error of the predicted current in the linear servo drive using a permanent magnet linear synchronous motor is analyzed and a modified cross-coupling decoupling synchronous frame PI current controller is proposed in order to improve the current control response under the control time delay. Simulation and experimental results show that the proposed current controller has an improved current control performance under both the electrical uncertainties of a servo drive system and the control time delay.

• Journal of Power Electronics
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• v.19 no.1
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• pp.179-189
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• 2019

Four-quadrant converters (4QCs) are widely used as AC-DC power conversion interfaces in many areas. A control delay commonly exists in the digital implementation process of 4QCs, especially for high power 4QCs with a low switching frequency. This usually results in alternating current distortion, increased current harmonic content and system instability. In this paper, the control delay is divided into a computation delay and a PWM delay. The impact of the control delay on the performance of a 4QC is briefly analyzed. To obtain a fundamental value of AC current that is as accurately as possible, a specific sampling method considering the PWM pattern is introduced. Then a current predictive control based on a modified z-transform is proposed, which is effective in reducing the control delay and easy in terms of digital implementation. In addition, it does not depend on object models and parameters. The feasibility and effectiveness of the proposed predictive current control method is verified by simulation and experimental results.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.231-231
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• 2000

It is proposed that a novel method which can compensate the time delay occurs in overall system, when voltage and current is measured, owing to LPF, hysteresis control inverter and microprocessor program computation time. The Proposed scheme estimates the time delay using the difference between Q-axis stator current command and time delayed Q-axis stator current in synchronous reference frame, and compensates the time delay of voltage and current using angular displacement of DQ transformation. The proposed scheme compensates accurately the time delay occurs in overall system. Therefore performance of vector control system is improved highly and it is verified by simulation and experiment.

• ETRI Journal
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• v.39 no.4
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• pp.582-591
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• 2017

To address the wire complexity problem in large-scale globally asynchronous, locally synchronous systems, a current-mode ternary encoding scheme was devised for a two-phase asynchronous protocol. However, for data transmission through a very long wire, few studies have been conducted on reducing the long propagation delay in current-mode circuits. Hence, this paper proposes a current steering logic (CSL) that is able to minimize the long delay for the devised current-mode ternary encoding scheme. The CSL creates pulse signals that charge or discharge the output signal in advance for a short period of time, and as a result, helps prevent a slack in the current signals. The encoder and decoder circuits employing the CSL are implemented using $0.25-{\mu}m$ CMOS technology. The results of an HSPICE simulation show that the normal and optimal mode operations of the CSL achieve a delay reduction of 11.8% and 28.1%, respectively, when compared to the original scheme for a 10-mm wire. They also reduce the power-delay product by 9.6% and 22.5%, respectively, at a data rate of 100 Mb/s for the same wire length.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2005.11a
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• pp.99-102
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• 2005

In the paper, a proposed VCO based on bondwire inductances and nMOS varactors was implemented in a standard $0.25\;{\mu}m$ CMOS process. Using the new drain current model and a propagation delay time model equations, the operation speed of CMOS gate will predict the dependence on the load capacitance and the depth of oxide, threshold voltage, the supply voltage, the channel length. This paper describes the result of simulation which calculated a gate propagation delay time by using new drain current model and a propagation delay time model. At the result, When the reverse bias voltage on the substrate changes from 0 voltage to 3 voltage, the propagation delay time is appeared the delay from 0.8 nsec to 1 nsec. When the reverse voltage is biased on the substrate, for reducing the speed delay time, a supply voltage has to reduce. The $g_m$ value of MOSFET is calculated by using new drain current model.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.481-482
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• 2011

New discrete time domain models for the peak current controlled (PCC) power LED drivers in continuous conduction mode include for the first time the effects of time delay in the pulse-width-modulator. Realistic amounts of time delay are found to have significant effects on the average output LED current and on the critical inductor value at the boundary between two conduction modes. Especially, the time delay can provide an accurate LED current for the PCC buck converter with a wide input voltage. The models can also predict the critical inductor values at the mode boundary as functions of the input voltage and the time delay.