• Journal of the Korea Institute of Military Science and Technology
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• v.25 no.5
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• pp.545-551
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• 2022

We proposed a design method for constant current pyro squib circuit. The current method using N MOSFET for the stability problem has a weakness of the current change, requiring a new design. This paper identified the problem with conventional squib circuit where the current is reduced by 25 % when maximum resistance is 3 ohms. Thus, we proposed a stable constant current driving circuit using P MOSFET and PNP BJT. We confirmed stable constant circuit operation through simulations and measurements of the proposed circuit design where the current did not change until the resistance reached 3 ohms.

• Transactions on Electrical and Electronic Materials
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• v.14 no.5
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• pp.235-241
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• 2013

A low power CMOS control circuit is applied in an integrated DC-DC buck converter. The integrated converter is composed of a feedback control circuit and power block with 0.35 ${\mu}m$ CMOS process. A current-sensing circuit is integrated with the sense-FET method in the control circuit. In the current-sensing circuit, a current-mirror is used for a voltage follower in order to reduce power consumption with a smaller chip-size. The N-channel MOS acts as a switching device in the current-sensing circuit where the sensing FET is in parallel with the power MOSFET. The amplifier and comparator are designed to obtain a high gain and a fast transient time. The converter offers well-controlled output and accurately sensed inductor current. Simulation work shows that the current-sensing circuit is operated with an accuracy of higher than 90% and the transient time of the error amplifier is controlled within $75{\mu}sec$. The sensing current is in the range of a few hundred ${\mu}A$ at a frequency of 0.6~2 MHz and an input voltage of 3~5 V. The output voltage is obtained as expected with the ripple ratio within 1%.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.54 no.11
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• pp.540-546
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• 2005

This paper presents a boost circuit topology driving in high - frequency It solves the problem which arised from hard-switching in high-frequency using a period of resonant circuit and operating under the principle of ZCS turn-on and ZCZVS turn-off commutation schemes. In the existing circuit, it has the high voltage and current stress in free- wheeling diode. But in the proposed circuit, it has voltage and current stress which is lower than voltage and current stress of existing circuit with modifing a location of free-wheeling diode. In this paper, it explained the circuit operation of each mode and the waveform of each mode. Also the experiment results compare the voltage and current stress of free-wheeling diode in the existing circuit with the voltage and current stress of that in the proposed circuit. Moreover, it compares and analyzes the proposed circuit's efficiency with the existing circuit's efficiency according to the change of load current.

• Transactions on Electrical and Electronic Materials
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• v.18 no.1
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• pp.42-45
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• 2017

In this paper, a transformer type SFCL (superconducting fault current limiter) using an additional magnetically coupled circuit was suggested. Its transient fault current limiting characteristics, due to the winding direction of additional coupled circuit, were analyzed through fault current limiting tests. The suggested transformer type SFCL was composed of the primary winding, and one secondary winding wound on the same iron core together with an additional magnetically coupled circuit. That circuit consists of the other secondary winding together with the other SC (superconducting) element connected in parallel with its other secondary winding. As one of the effective design parameters to affect the transient fault current of the SFCL, the fault current limiting tests of the suggested SFCL were carried out considering the winding direction of its additional coupled circuit. It was confirmed that, through the analysis on the fault current tests of the SFCL, the quench sequence of two SC elements comprising the suggested SFCL could be adjusted by the winding direction of the additional coupled circuit.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.9
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• pp.667-670
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• 2010

In this paper, a high voltage current sensing circuit for boost converter is designed and verified by Cadence SPECTRE simulations. The current mirror pair, power and sensing metal-oxide semiconductor field effect transistors (MOSFETs) with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side lateral-diffused MOS transistor (LDMOST) switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35 ${\mu}m$ BCD process show that current sensing is accurate and the pulse frequency modulation (PFM) boost converter using the proposed current sensing circuit satisfies with the specifications.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.59 no.4
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• pp.473-476
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• 2010

In this paper, we analyzed the short circuit current of a low voltage direct current distribution system. For the analysis, we performed the modeling of the low voltage direct current distribution system with a 6-pulse three-phase thyristor rectifier using the PSCAD/EMTDC, surveyed impedance of sources, transformers and distribution lines to run a simulation. A result of the simulation is that short circuit currents of the direct current distribution system with the rectifier decreased due to a thyristor-ON-resistance(Ron). But in case of the low thyristor-ON resistance, output fault current of the rectifier increased over three-phase short circuit current of an AC power system without a rectifier by regular ratio of the rectifier. Because the output fault current of the rectifier can increase over interrupting the capacity of circuit breakers, studying short circuit currents of a low voltage direct current distribution system with a rectifier is necessary for introducing the direct current distribution systems.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.8
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• pp.49-63
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• 1997

This paper presents a current sensor that detects defects in CMOS integrated circuits using the current testing technique. The current sensor is built in a CMOS integrated circuit to test an abnormal current. The proposed circuit has a very small impact on the performance of the circuit under test during the normal mode. In the testing mode, the proposed circuit detects the abnormal current caused by permanent manufacturing defects and determines whether the circuit under test is defect-free or not. The proposed current sensor is simple and requires no external voltage and current sources. Hence, the circuit has less area and performance degradation, and is more efficient than any previous works. The validity and effectiveness are verified through the HSPICE simulation on circuits with defects.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.55 no.8
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• pp.396-402
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• 2006

Even the case DC circuit Breaker have good quality for interruption of high current like heavy load current, short-circuit current, the verification for small current breaking capability of circuit breaker should be performed. It comes from the reason DC small current breaking failure can be lead to break out second heavy fault condition and in the long run substation shutdown. In this paper, we can find the characteristics of DC small current and international test standard discription about small current breaking and one of the proper solution to get over it.

• The KIPS Transactions:PartA
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• v.15A no.2
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• pp.69-74
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• 2008

This paper proposes a structure of low-power MOS current-mode logic circuit with sleep-transistor to reduce the leakage current. The sleep-transistor is used to high-threshold voltage transistor to minimize the leakage current. The $16\;{\times}\;16$ bit parallel multiplier is designed by the proposed circuit structure. Comparing with the conventional MOS current-model logic circuit, the circuit achieves the reduction of the power consumption in sleep mode by 1/50. This circuit is designed with Samsung $0.35\;{\mu}m$ CMOS process. The validity and effectiveness are verified through the HSPICE simulation.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1037-1040
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• 1998

In this paper, current conveyor building block is introduced and CMOS realization of this block is given. The input-impedance characteristics, current-transfer characteristics and voltage-transfer characteristics of this proposed current conveyor circuit are given. This characteristics of the CMOS current conveyor circuit is useful of the various applications which require a wideband. Using the Spice tool, the circuit is designed and the characteristics of CMOS current conveyor circuit is considered. Finally, refer to the simple applications.