• Journal of the Institute of Electronics Engineers of Korea SC
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• v.49 no.4
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• pp.61-68
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• 2012

In this paper, a closed-loop sensorless stroke control system for a linear compressor has been designed. In order to estimate the piston position accurately, motor parameters are identified as a function of the piston position and the motor current. These parameters are stored in ROM table and used later for the accurate estimation of piston position. The identified motor parameters are approximated to the several surface functions in order to decrease memory size. They can also be divided into 2 or 4 subsections to decrease identification errors. The effect of the order of surface functions and division of subsections on identification errors and computation time is analyzed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.11a
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• pp.239-242
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• 2003

자동차 점화장치는 전원으로부터 공급된 낮은 전압을 점화코일을 통하여 연소실의 혼합기를 연소시키기에 충분한 고전압을 발생시키는 장치이며, 점화장치의 핵심은 점화코일이다. 이 점화코일은 절연성능이 우수한 절연재료가 사용되지만 고전압의 발생으로 점화코일 내부에서 일어나는 전기적 열화로 인해 누설전류가 흐르게 되어 전기적 고장을 초래할 수 있다. 이로 인하여 절연재료의 수명은 단축되며, 또한 점화코일에 전류가 흐름으로써 코일 내부에서 발생하는 온도변화에 따른 절연열화로 점화코일의 성능이 저하될 수 있다. 따라서 본 연구에서는 점화코일에 사용되고 있는 절연재료에 전압이 인가될 때 발생할 수 있는 비파괴검사의 일종인 부분방전 측정을 통하여 전압변화에 따른 에폭시 성형 점화코일의 위상각($\Phi$) - 방전전하량(q) - 발생빈도수(n)의 특성 변화를 조사하고 분석함으로써 점화코일의 수명을 예측하여 자동차 점화장치의 성능진단과 정보제공을 자동차 전기장치의 발전에 도움이 될 것을 기대하며, 온도상승에 따른 점화코일의 부분방전 특성을 실험하고 분석하였다.

• Current Optics and Photonics
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• v.4 no.6
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• pp.472-476
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• 2020

We have investigated the impact of optical filter bandwidth on the performance of all-optical automatic gain-controlled (AGC) erbium-doped fiber amplifiers (EDFAs). In principle, an optical bandpass filter (OBPF) should be placed within the feedback gain-clamping loop to set the lasing wavelength as well as the passband of the feedback amplified spontaneous emission (ASE) in all-optical AGC EDFA. From our measurement results, we found that the power level of feedback ASE with 0.1 nm passband of the optical filter was smaller than the ones with >0.2 nm passband cases. Therefore, the peak-to-peak power variation of the surviving channel with 0.1 nm passband was much larger than the ones with >0.2 nm passband. In addition, no significant difference in the power level of the feedback ASE was observed when the passband of the optical filter was ranging from 0.2 nm to 4.5 nm in our measurements. From these results, we have concluded that the passband of the optical filter should be slightly larger than 0.2 nm by taking into account the effect of feedback ASE power and the efficient use of the EDFA gain spectrum for the lasing ASE peak.

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.2
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• pp.309-316
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• 2019

In this paper, a low-jitter delay-locked loop that compensates for local clock skew is presented. The proposed DLL consists of a phase splitter, a phase detector(PD), a charge pump, a bias generator, a voltage-controlled delay line(VCDL), and a level converter. The VCDL uses self-biased delay cells using current mode logic(CML) to have insensitive characteristics to temperature and supply noises. The phase splitter generates two reference clocks which are used as the differential inputs of the VCDL. The PD uses the only single clock from the phase splitter because the PD in the proposed circuit uses CMOS logic that consumes less power compared to CML. Therefore, the output of the VCDL is also converted to the rail-to-rail signal by the level converter for the PD as well as the local clock distribution circuit. The proposed circuit has been designed with a $0.13-{\mu}m$ CMOS process. A global CLK with a frequency of 1-GHz is externally applied to the circuit. As a result, after about 19 cycles, the proposed DLL is locked at a point that the control voltage is 597.83mV with the jitter of 1.05ps.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.7
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• pp.23-29
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• 2011

A dB-linearity improved variable gain amplifier (VGA) for GPS receiver is presented. The Proposed dB-linear current generator has improved dB-linearity error of ${\pm}0.15$dB. The VGA for GPS is designed using proposed dB-linear current generator and composed of 3 stage amplifiers. The IF frequency is assumed as 4MHz and the linearity requirement of the VGA for GPS receiver is defined as 24dBm of IIP3 using cascaded IIP3 equation and the VGA satisfies 24dBm when minimum gain mode. The DC-offset voltage is eliminated using DC-offset cancelation loop. The gain range is from -8dB to 52dB and the dB-linearity error satisfies ${\pm}0.2$dB. The 3-dB frequency has range of 35MHz~106MHz for the gain range. The VGA is designed using 0.18${\mu}m$ CMOS process. The power consumption is 3mW with 1.8V supply voltage.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.11
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• pp.107-113
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• 2014

A VCO (Voltage Controlled Oscillator) and a divide-by-4 high speed frequency divider are implemented using 65nm CMOS technology for 60GHz wireless communication system. The mm-wave VCO was designed by NMOS cross-coupled LC type using current source. The architecture of the divide-by-4 high speed frequency divider is differential ILFD (Injection Locking Frequency Divider) with varactor to control frequency range. The frequency divider also uses current sources to get good phase noise characteristics. The measured results show that the VCO has 64.36~67.68GHz tuning range and the frequency divider divides the VCO output by 4 exactly. The high output power of 5.47~5.97dBm from the frequency divider is measured. The phase noise of the VCO including the frequency divider are -77.17dBc/Hz at 1MHz and -110.83dBc/Hz at 10MHz offset frequency. The power consumption including VCO is 38.4mW with 1.2V supply voltage.

• Journal of Biomedical Engineering Research
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• v.27 no.4
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• pp.154-163
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• 2006

A 64-channel magnetocardiogram (MCG) system using low-noise superconducting quantum interference device (SQUID) planar gradiometers was developed for the measurements of cardiac magnetic fields generated by the heart electric activity. Owing to high flux-to-voltage transfers of double relaxation oscillation SQUID (DROS) sensors, the flux-locked loop electronics for SQUID operation could be made simpler than that of conventional DC SQUIDs, and the SQUID control was done automatically through a fiber-optic cable. The pickup coils are first-order planar gradiometers with a baseline of 4 em. The insert has 64 planar gradiometers as the sensing channels and were arranged to measure MCG field components tangential to the chest surface. When the 64-channel insert was in operation everyday, the average boil-off rate of the dewar was 3.6 Lid. The noise spectrum of the SQUID planar gradiometer system was about 5 fT$_{rms}$/$\checkmark$Hz at 100 Hz, operated inside a moderately shielded room. The MCG measurements were done at a sampling rate of 500 Hz or 1 kHz, and realtime display of MCG traces and heart rate were displayed. After the acquisition, magnetic field mapping and current mapping could be done. From the magnetic and current information, parameters for the diagnosis of myocardial ischemia were evaluated to be compared with other diagnostic methods.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.30 no.2
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• pp.152-159
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• 2019

In general, a Doppler radar can measure only the velocity of a moving target. To measure the distance of a moving target, it is necessary to use a frequency-modulated continuous wave or pulse radar. However, the latter are very complex in terms of both hardware as well as signal processing. Moreover, the requirement of wide bandwidth necessitates the use of millimeter-wave frequency bands of 24 GHz and 77 GHz. Recently, a new kind of Doppler radar using multitone frequency has been studied to sense the distance of moving targets in addition to their speed. In this study, we show that distance sensing of moving targets is possible by adjusting only the frequency of a 2.4 GHz Doppler radar with low cost phase lock loop. In particular, we show that distance can be sensed using only alternating current information without direct current offset information. The proposed technology satisfies the Korean local standard for low power radio equipment for moving target identification in the 2.4 GHz frequency band, and enables multiple long-range sensing and radio-frequency identification applications.

• Proceedings of the KIPE Conference
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• 2018.11a
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• pp.95-97
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• 2018

The power quality of Single Phase Grid-Connected Inverters (GCIs) has received much attention with the increasing number of Distributed Generation (DG) systems. However, the performance of single phase GCIs get degraded due to several factors such as the grid voltage harmonics, the dead time effect, and the turn ON/OFF of the switches, which causes the harmonics at the output of GCIs. Therefore, it is not easy to satisfy the harmonic standards such as IEEE 519 and P1547 without the help of harmonic compensator. To meet the harmonic standards a certain kind of harmonic controller needs to be added to the current control loop to effectively mitigate the low order harmonics. In this paper, the harmonic compensation is performed using a novel robust harmonic compensation method based on Digital Lock-in Amplifier (DLA). In the proposed technique, DLAs are used to extract the amplitude and phase information of the harmonics from the output current and compensate it by using a simple PI controller in the feedforward manner. In order to show the superior performance of the proposed harmonic compensation technique, it is compared with those of conventional harmonic compensation methods in terms of the effectiveness of harmonic elimination, complexity, and implementation. The validity of the proposed harmonic compensation techniques for the single phase GCIs is verified through the experimental results with a 5kW single phase GCI. Index Terms -Single Phase Grid Connected Inverter (SPGCI), Harmonic Compensation Method, Total Harmonic Distortion (THD) and Harmonic Standard.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.70-77
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• 2013

We suggest a low area and high efficiency switched-mode power supply (SMPS) with a pulse width modulation (PWM) generator based on a pseudo relaxation-oscillating technique. In the proposed circuit, the PWM duty ratio is determined by the voltage slope control of an internal capacitor according to amount of charging current in a PWM generator. Compared to conventional SMPSs, the proposed control method consists of a simple structure without the filter circuits needed for an analog-controlled SMPS or the digital compensator used by a digitally-controlled SMPS. The proposed circuit is able to operate at switching frequency of 1MHz~10MHz, as this frequency can be controlled from the selection of one of the internal capacitors in a PWM generator. The maximum current of the core circuit is 2.7 mA, and the total current of the entire circuit including output buffer driver is 15 mA at 10 MHz switching frequency. The proposed SMPS has a simulated maximum ripple voltage of 7mV. In this paper, to verify the operation of the proposed circuit, we performed simulation using Dongbu Hitek BCD $0.35{\mu}m$ technology and measured the proposed circuit.