• Journal of the Microelectronics and Packaging Society
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• v.21 no.1
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• pp.1-6
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• 2014

Flip chip bonded LED packages possess lower thermal resistance than wire bonded LED packages because of short thermal path. In this study, thermal and bonding properties of flip chip bonded high brightness LED were evaluated for Au-Sn thermo-compression bonded LEDs and Sn-Ag-Cu reflow bonded LEDs. For the Au-Sn thermo-compression bonding, bonding pressure and bonding temperature were 50 N and 300oC, respectively. For the SAC solder reflow bonding, peak temperature was $255^{\circ}C$ for 30 sec. The shear strength of the Au-Sn thermo-compression joint was $3508.5gf/mm^2$ and that of the SAC reflow joint was 5798.5 gf/mm. After the shear test, the fracture occurred at the isolation layer in the LED chip for both Au-Sn and SAC joints. Thermal resistance of Au-Sn sample was lower than that of SAC bonded sample due to the void formation in the SAC solder.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.4
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• pp.7-13
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• 2019

Power module is getting attention from electronic industries such as solar cell, battery and electric vehicles. Transient liquid phase (TLP) boding, sintering with Ag and Cu powders and wire bonding are applied to power module packaging. Sintering is a popular process but it has some disadvantages such as high cost, complex procedures and long bonding time. Meanwhile, TLP bonding has lower bonding temperature, cost effectiveness and less porosity. However, it also needs to improve ductility of the intermetallic compounds (IMCs) at the joint. Wire boding is also an important interconnection process between semiconductor chip and metal lead for direct bonded copper (DBC). In this study, TLP bonding using Sn-based solders and wire bonding process for power electronics packaging are described.

• Journal of Welding and Joining
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• v.32 no.3
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• pp.11-18
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• 2014

TSV(through silicon via) filling technology is making a hole in Si wafer and electrically connecting technique between front and back of Si die by filling with conductive metal. This technology allows that a three-dimensionally connected Si die can make without a large number of wire-bonding. These TSV technologies require various engineering skills such as forming a via hole, forming a functional thin film, filling a conductive metal, polishing a wafer, chip stacking and TSV reliability analysis. This paper addresses the TSV filling using Cu electrodeposition. The impact of plating conditions with additives and current density on electrodeposition will be considered. There are additives such as accelerator, inhibitor, leveler, etc. suitably controlling the amount of the additive is important. Also, in order to fill conductive material in whole TSV hole, current wave forms such as PR(pulse reverse), PPR(periodic pulse reverse) are used. This study about semiconductor packaging will be able to contribute to the commercialization of 3D TSV technology.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.273.1-273.1
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• 2014

Graphene, a two dimensional plane structure of $sp^2$ bonding, has been promised for a new material in many scientific fields such as physics, chemistry, and so on due to the unique properties. Chemical vapor deposition (CVD) method using transitional metals as a catalyst can synthesize large scale graphene with high quality and transfer on other substrates. However, it is difficult to control the number of graphene layers. Therefore, it is important to manipulate the number of graphene layers. In this work, homogeneous solid solution of Cu and Ni was used to control the number of graphene layers. Each films with different thickness ratio of Cu and Ni were deposited on $SiO_2/Si$ substrate. After annealing, it was confirmed that the thickness ratio accords with the composition ratio by X-ray diffraction (XRD). The synthesized graphene from CVD was analyzed via raman spectroscopy, UV-vis spectroscopy, and 4-point probe to evaluate the properties. Therefore, the number of graphene layers at the same growth condition was controlled, and the correlation between mole fraction of Ni and the number of graphene layers was investigated.

• Journal of the Korean institute of surface engineering
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• v.46 no.1
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• pp.22-28
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• 2013

$WS_2$ particles were added to micro-diamond blades with Cu/Sn binding metal as lubricants to improve cutting efficiency. It was found in previous works that the added $WS_2$ lubricant could reduce remarkably the momentary energy consumption during dicing tests but increased wear rate slightly owing to weak bonding between lubricant particles and bond metals. In the present work, the surface of $WS_2$ lubricant particles were etched for activating the surface of $WS_2$ particles that provide even distribution of particles during powder mixing process and improvement of wetting at the interfaces between $WS_2$ particles and molten Cu/Sn bond metals during pressurized sintering so that could provide the improved strength of micro-blades and result in extended life. Chipping behavior of workpiece with the types of micro-blades including $WS_2$ were compared because it is important in semiconductor and micro-packaging industries to control average roughness and straightness of sliced surface which is closely related with quality.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.4
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• pp.7-11
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• 2013

As thermosonic ball bonding is developed for more and more advanced applications in the electronic packaging industry, the control of process stresses induced on the integrated circuits becomes more important. If Cu bonding wire is used instead of Au wire, larger ultrasonic levels are common during bonding. For advanced microchips the use of Cu based wire is risky because the ultrasonic stresses can cause chip damage. This risk needs to be managed by e.g. the use of ultrasound during the impact stage of the ball on the pad ("pre-bleed") as it can reduce the strain hardening effect, which leads to a softer deformed ball that can be bonded with less ultrasound. To find the best profiles of ultrasound during impact, a numerical model is reported for ultrasonic bonding with capillary dynamics combined with a geometrical model describing ball deformation based on volume conservation and stress balance. This leads to an efficient procedure of ball bond modelling bypassing plasticity and contact pairs. The ultrasonic force and average stress at the bond zone are extracted from the numerical experiments for a $50{\mu}m$ diameter free air ball deformed by a capillary with a hole diameter of $35{\mu}m$ at the tip, a chamfer diameter of $51{\mu}m$, a chamfer angle of $90^{\circ}$, and a face angle of $1^{\circ}$. An upper limit of the ultrasonic amplitude during impact is derived below which the ultrasonic shear stress at the interface is not higher than 120 MPa, which can be recommended for low stress bonding.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.37 no.3
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• pp.373-378
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• 2013

The speed change performance of transmissions has become a serious issue because of the increase in the inertia moment that has accompanied increases in engine output and transmission size. Therefore, it is necessary to develop better wear resistant friction materials. In this study, an appropriate sintered friction component for the synchronizer ring of a diesel manual transmission was developed, and its bonding characteristics were analyzed. That is, a process for bonding an Fe-based base material and Cu-based sintered friction material was developed. BSE and EDX analyses of this bonding layer were conducted, along with a shear strength test, to determine the bonding characteristics.

• Korean Journal of Materials Research
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• v.34 no.3
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• pp.170-174
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• 2024

In this study, we report the microstructural evolution and shear strength of an Sn-Sb alloy, used for die attach process as a solder layer of backside metal (BSM). The Sb content in the binary system was less than 1 at%. A chip with the Sn-Sb BSM was attached to a Ag plated Cu lead frame. The microstructure evolution was investigated after die bonding at 330 ℃, die bonding and isothermal heat treatment at 330 ℃ for 5 min and wire bonding at 260 ℃, respectively. At the interface between the chip and lead frame, Ni₃Sn₄ and Ag₃Sn intermetallic compounds (IMCs) layers and pure Sn regions were confirmed after die bonding. When the isothermal heat treatment is conducted, pure Sn regions disappear at the interface because the Sn is consumed to form Ni₃Sn₄ and Ag₃Sn IMCs. After the wire bonding process, the interface is composed of Ni₃Sn₄, Ag₃Sn and (Ag,Cu)₃Sn IMCs. The Sn-Sb BSM had a high maximum shear strength of 78.2 MPa, which is higher than the required specification of 6.2 MPa. In addition, it showed good wetting flow.

• Journal of Welding and Joining
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• v.24 no.6
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• pp.21-27
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• 2006

This study was focused on the evaluation of the thermo-mechanical board-level reliability of Pb-bearing and Pb-free surface mount assemblies. The composition of Pb-bearing solder was a typical Sn-37Pb and that of Pb-free solder used in this study was a representative Sn-3.0Ag-0.5Cu in mass %. Thermal shock test was chosen for the reliability evaluation of the solder joints. Typical $Cu_6Sn_5$ intermetallic compound (IMC) layer was formed between both solders and Cu lead frame at the as-reflowed state, while a layer of $Cu_3Sn$ was additionally formed between the $Cu_6Sn_5$ and Cu lead frame during the thermal shock testing. Thickness of the IMC layers increased with increasing thermal shock cycles, and this is very similar result with that of isothermal aging study of solder joints. Shear test of the multi layer ceramic capacitor(MLCC) joints was also performed to investigate the degradation of mechanical bonding strength of solder joints during the thermal shock testing. Failure mode of the joints after shear testing revealed that the degradation was mainly due to the excessive growth of the IMC layers during the thermal shock testing.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.3
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• pp.1-10
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• 2023

Recently, as the demand for high-performance computers and mobile products increases, semiconductor packages are becoming high-integration and high-density. Therefore, in order to transmit a large amount of data at once, micro bumps such as flip-chip and Cu pillar that can reduce bump size and pitch and increase I/O density are used. However, when the size of the bumps is smaller than 70 ㎛, the brittleness increases and electrical properties decrease due to the rapid increase of the IMC volume fraction in the solder joint, which deteriorates the reliability of the solder joint. Therefore, in order to improve these issues, a layer that serves to prevent diffusion is inserted between the UBM (Under Bump Metallization) or pillar and the solder cap. In this review paper, various studies to improve bonding properties by suppressing excessive IMC growth of micro-bumps through additional layer insertion were compared and analyzed.