• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.4
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• pp.343-346
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• 2010

We have investigated growth of CdTe thin films by using (As, GaAs) buffer layers for application of large scale IR focal plane arrays(IFPAs). Buffer layers were grown by molecular beam epitaxy(MBE), which reduced the lattice mismatch of CdTe/Si and prevented native oxide on Si substrates. CdTe thin films were grown by metal organic chemical deposition system(MOCVD). As a result, polycrystalline CdTe films were grown on Si(100) and arsenic coated-Si(100) substrate. In other case, single crystalline CdTe(400) thin film was grown on GaAs coated-Si(100) substrate. Moreover, we observed hillock structure and mirror like surface on the (400) orientated epitaxial CdTe thin film.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.2
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• pp.125-130
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• 2000

Two step growth of reduced pressure chemical vapor eposition has been successfully developed to achieve in-situ phosphorus-doped silicon epilayers, and the characteristic evolution on their microstructures has been investigated using scanning electron microscopy, transmission electron microscopy, and secondary ion mass spectroscopy. The two step growth, which employs heavily in-situ P doped silicon buffer layer grown at low temperature, proposes crucial advantages in manipulating crystal structures of in-situ phosphorus doped silicon. In particular, our experimental results showed that with annealing of the heavily P doped silicon buffer layers, high-quality epitaxial silicon layers grew on it. the heavily doped phosphorus in buffer layers introduces into native oxide and plays an important role in promoting the dispersion of native oxides. Furthermore, the phosphorus doping concentration remains uniform depth distribution in high quality single crystalline Si films obtained by the two step growth.

• Transactions on Electrical and Electronic Materials
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• v.18 no.1
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• pp.55-57
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• 2017

Amorphous oxide thin film transistors (TFTs) were fabricated with 0.5 wt% silicon doped zinc tin oxide (a-0.5SZTO) thin film deposited by radio frequency (RF) magnetron sputtering. In order to investigate the effect of annealing treatment on the electrical properties of TFTs, a-0.5SZTO thin films were annealed at three different temperatures ($300^{\circ}C$, $500^{\circ}C$, and $700^{\circ}C$ for 2 hours in a air atmosphere. The structural and electrical properties of a-0.5SZTO TFTs were measured using X-ray diffraction and a semiconductor analyzer. As annealing temperature increased from $300^{\circ}C$ to $500^{\circ}C$, no peak was observed. This provided crystalline properties indicating that the amorphous phase was observed up to $500^{\circ}C$. The electrical properties of a-0.5SZTO TFTs, such as the field effect mobility (${\mu}_{FE}$) of $24.31cm^2/Vs$, on current ($I_{ON}$) of $2.38{\times}10^{-4}A$, and subthreshold swing (S.S) of 0.59 V/decade improved with the thermal annealing treatment. This improvement was mainly due to the increased carrier concentration and decreased structural defects by rearranged atoms. However, when a-0.5SZTO TFTs were annealed at $700^{\circ}C$, a crystalline peak was observed. As a result, electrical properties degraded. ${\mu}_{FE}$ was $0.06cm^2/Vs$, $I_{ON}$ was $5.27{\times}10^{-7}A$, and S.S was 2.09 V/decade. This degradation of electrical properties was mainly due to increased interfacial and bulk trap densities of forming grain boundaries caused by the annealing treatment.

• Journal of the Korean institute of surface engineering
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• v.32 no.3
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• pp.235-238
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• 1999

Silicon dioxide films were prepared by anodizing silicon wafers in an ethylene $glycol+HNO_3(0.04{\;}N)$ at 20 to $70^{\circ}C$. The voltage between silicon anode and platinum cathode was measured during this process. Under the constant current electrolysis, the voltage increased with oxide film growth. The transition time at which the voltage reached the predetermined value depended on the temperature of the electrolyte. After the time of electrolysis reached the transition time, the anodization was changed the constant voltage mode. The depth profile of oxide film/Si substrate was confirmed by XPS analysis to study the influence of the electrolyte temperature on the anodization. Usually, the oxide-silicon peaks disappear in the silicon substrate, however, this peak was not small at $45^{\circ}C$ in this region.

• Korean Journal of Materials Research
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• v.14 no.6
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• pp.413-419
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• 2004

Recently, Silicon On Insulator (SOI) devices emerged to achieve better device characteristics such as higher operation speed, lower power consumption and latch-up immunity. Nevertheless, there are many detrimental defects in SOI wafers such as hydrofluoric-acid (HF)-defects, pinhole, islands, threading dislocations (TD), pyramid stacking faults (PSF), and surface roughness originating from quality of buried oxide film layer. Although the number of defects in SOI wafers has been greatly reduced over the past decade, the turn over of high-speed microprocessors using SOI wafers has been delayed because of unknown defects in SOI wafers. A new characterization method is proposed to investigate the crystalline quality, the buried oxide integrity and some electrical parameters of bonded SOI wafers. In this study, major surface defects in bonded SOI are reviewed using HF dipping, Secco etching, Cu-decoration followed by focused ion beam (FIB) and transmission electron microscope (TEM).

• Journal of the Korean Ceramic Society
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• v.43 no.6 s.289
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• pp.362-368
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• 2006

Epitaxial $Ba_{0.5}Sr_{0.5}TiO_3$ (BSTO) thin films have been grown on TiN buffered Si (001) substrates by Pulsed Laser Deposition (PLD) method and the effects of substrate temperature and oxygen partial pressure during the deposition on their dielectric properties and crystallinity were investigated. The crystal orientation, epitaxy nature, and microstructure of oxide thin films were investigated using X-Ray Diffraction (XRD) and Transmission Electron Microscopy (TEM). Thin films were prepared with laser fluence of $4.2\;J/cm^2\;and\;3\;J/cm^2$, repetition rate of 8 Hz and 10 Hz, substrate temperatures of $700^{\circ}C$ and ranging from $350^{\circ}C\;to\;700^{\circ}C$ for TiN and oxide respectively. BSTO thin-films were grown on TiN-buffered Si substrates at various oxygen partial pressure ranging from $1{\times}10^{-4}$ torr to $1{\times}10^{-5}$ torr. The TiN buffer layer and BSTO thin films were grown with cube-on-cube epitaxial orientation relationship of $[110](001)_{BSTO}{\parallel}[110](001)_{TiN}{\parallel}[110](001)_{Si}$. The crystallinity of BSTO thin films was improved with increasing substrate temperature. C-axis lattice parameters of BSTO thin films, calculated from XRD ${\theta}-2{\theta}$ scans, decreased from 0.408 m to 0.404 nm and the dielectric constants of BSTO epitaxial thin films increased from 440 to 938 with increasing processing oxygen partial pressure.

• Korean Journal of Materials Research
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• v.14 no.11
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• pp.821-827
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• 2004

Titanium oxide thin films were prepared on Si(100) substrates by R.F. magnetron reactive sputtering at $30\sim200watt$ R.F power range, and annealed at $600^{\circ}C\sim800^{\circ}C$ for 1 hour. The properties of $TiO_2$ thin films were analyzed using x-ray, ${\alpha}-step$, ellipsometer, scanning electron microscopy, and FT-IR spectrometer. Upon in-situ depositions, the initial phase of $TiO_2$ thin film showed non-crystalline phase at R.F. power $30\sim100$ watt. The crosssection of $TiO_2$ thin films were sbserved to be the columnar structure. With the increasing R.F power and annealing temperature, the grain size, crystallinity, refractive index, and void size of titanium oxides showed a tended to increase. The FT-IR transmittance spectra of titanium oxide thin films have the obsorption band of Ti-O bond, Si-O bond, Si-O-Ti bond and O-H bond. With the increase of R.F. power and annealing temperature, these films have the stronger bond structures. It is considered that such a phenomena is due to phase transition and good crystallinity

• Transactions on Electrical and Electronic Materials
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• v.17 no.4
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• pp.201-203
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• 2016

Transparent conductive multilayers have been fabricated using transparent amorphous Si doped indium oxide (ISO) semiconductors and metallic Ag of ISO/Ag/ISO. The resistivity of a multilayer is dependent on the middle layer thickness of silver. The thickness of the Ag layer is fixed at 11 nm and takes into account cost and optical transmittance. As-deposited ISO/Ag (11 nm)/ISO multilayer shows a measured resistivity of 7.585×10⁻⁵ Ω cm. After a post annealing treatment of 400℃, the resistivity is reduced to 4.332×10⁻⁵ Ω cm. The reduction of resistivity should be explained that the mobility of the multilayer increased due to the optimized crystalline, meanwhile, the Hall concentration of the multilayer showed an obscure change because the carriers mainly come from the insert of the Ag layer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.419-420
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• 2009

The authors fabricated the nanostructural patterns on the surface of SiN antireflection layer of polycrystalline Si solar cell and the surface of crystalline Si wafer using anodic aluminum oxide (AAO) masks in an inductively coupled plasma(ICP) etching process. The AAO nanopattern mask has the hole size of about 70~80nm and an ave rage lattice constant of 100nm. The transferred nano-patterns were observed by the scanning electron microscope (SEM) and the enhancement of solar cell efficiency will be presented.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.20 no.6
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• pp.254-261
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• 2010

Polycrystalline silicon (pc-Si) films are fabricated and characterized for application to pc-Si thin film solar cells as a seed layer. The amorphous silicon films are crystallized by the aluminum-induced layer exchange (ALILE) process with a structure of glass/Al/$Al_2O_3$/a-Si using various thicknesses of $Al_2O_3$ layers. In order to investigate the effects of the oxide layer on the crystallization of the amorphous silicon films, such as the crystalline film detects and the crystal grain size, the $Al_2O_3$ layer thickness arc varied from native oxide to 50 nm. As the results, the defects of the poly crystalline films are increased with the increase of $Al_2O_3$ layer thickness, whereas the grain size and crystallinity are decreased. In this experiments, obtained the average pc-Si sub-grain size was about $10\;{\mu}m$ at relatively thin $Al_2O_3$ layer thickness (${\leq}$ 16 nm). The preferential orientation of pc-Si sub-grain was <111>.