• Title/Summary/Keyword: Crypto

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An Efficient Hardware Implementation of ARIA Block Cipher Algorithm (블록암호 알고리듬 ARIA의 효율적인 하드웨어 구현)

  • Kim, Dong-Hyeon;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.05a
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    • pp.91-94
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    • 2012
  • This paper describes an efficient implementation of ARIA crypto algorithm which is a KS (Korea Standards) block cipher algorithm. The ARIA crypto-processor supports three master key lengths of 128/192/256-bit specified in the standard. To reduce hardware complexity, a hardware sharing is employed, which shares round function in encryption/decryption module with key initialization module. It reduces about 20% of gate counts when compared with straightforward implementation. The ARIA crypto-processor is verified by FPGA implementation, and synthesized with a 0.13-${\mu}m$ CMOS cell library. It has 33,218 gates and the estimated throughput is about 640 Mbps at 100 MHz.

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The Volatility and Estimation of Systematic Risks on Major Crypto Currencies (주요 암호화폐의 변동성 및 체계적 위험추정에 대한 비교분석)

  • Lee, Jungmann
    • Journal of Information Technology Applications and Management
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    • v.26 no.6
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    • pp.47-63
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    • 2019
  • The volatility of major crypto currencies was examined and they are diagnosed whether they have a systematic risk or not, by estimating market beta representing systematic risk using GARCH( Generalized Auto Regressive Conditional Heteroskedastieity) model. First, the empirical results showed that their prices are very volatile over time because of the existence of ARCH and GARCH effects. Second, in terms of efficiency, asymmetric GJR model was estimated to be the most appropriate model because the standard error of a market beta was less than that of the OLS model and GARCH model. Third, the estimated market beta of Bitcoin using GJR model was less than 1 at 0.8791, showing that there is no systematic risk. However, unlike OLS model, the market beta of Ethereum and Ripple was estimated at 1.0581 and 1.1222, showing that there is systematic risk. This result shows that bitcoin is less dangerous than Ripple and Ethereum, and ripple is the most dangerous of all three crypto currencies. Finally, the major cryptocurrency found that the negative impact caused greater variability than the positive impact, causing bad news to fluctuate more than good news, and therefore good news and bad news had a different effect on the variability.

FPGA Implementation of ARIA Encryption/Decrytion Core Supporting Four Modes of Operation (4가지 운영모드를 지원하는 ARIA 암호/복호 코어의 FPGA 구현)

  • Kim, Dong-Hyeon;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.237-240
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    • 2012
  • This paper describes an implementation of ARIA crypto algorithm which is a KS (Korea Standards) block cipher algorithm. The ARIA crypto-core supports three master key lengths of 128/192/256-bit specified in the standard and the four modes of operation including ECB, CBC, CTR and OFB. To reduce hardware complexity, a hardware sharing is employed, which shares round function in encryption/decryption module with key initialization module. The ARIA crypto-core is verified by FPGA implementation, the estimated throughput is about 1.07 Gbps at 167 MHz.

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Performance Analyses of Encryption Accelerator based on 2-Chip Companion Crypto ASICs for Economic VPN System (경제적인 VPN 시스템 구축을 위한 2-Chip 기반의 암호가속기 성능분석)

  • Lee Wan-Bok;Kim Jung-Tae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.2
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    • pp.338-343
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    • 2006
  • This paper describes about the design concept and the architecture of an economic VPN system which can perform fast crypto operations with cheap cost. The essence of the proposed system architecture is consisting of the system with two companion chips dedicated to VPN: one chip is a multi-purpose network processor for security machine and the other is a crypto acceleration chip which encrypt and decrypt network packets in a high speed. This study also addresses about some realizations that is required for fast prototyping such as the porting of an operating system, the establishment of compiler tool chain, the implementation of device drivers and the design of IPSec security engine. Especially, the second chip supports the most time consuming block cipher algorithms including 3DES, AES, and SEED and its performance was evaluated.

Threshold Encryption Scheme based on Cocks' IBE Scheme (Cocks' ID-based Scheme 기반 문턱 암호화 기술)

  • Bezzateev, Sergey V.;Kim, Dae-Youb
    • The KIPS Transactions:PartC
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    • v.19C no.4
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    • pp.225-230
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    • 2012
  • Since one of weak points of public crypto-systems is to require the verification of public key, identity based crypto-systems were proposed as an alternative. However, such techniques need a private key generator which can be a single point of failure. To improve such weakness, threshold identity-based crypto-systems were proposed. In this paper, we propose a new threshold identity-based encryption scheme which is constructed to extend an identity-based encryption scheme by Cocks. Since the proposed scheme is based on quadratic residues, it has smaller complexity of encryption. And we prove that the proposed scheme is secure against a chosen identity attack.

A New Robust Blind Crypto-Watermarking Method for Medical Images Security

  • Mohamed Boussif;Oussema Boufares;Aloui Noureddine;Adnene Cherif
    • International Journal of Computer Science & Network Security
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    • v.24 no.3
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    • pp.93-100
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    • 2024
  • In this paper, we propose a novel robust blind crypto-watermarking method for medical images security based on hiding of DICOM patient information (patient name, age...) in the medical imaging. The DICOM patient information is encrypted using the AES standard algorithm before its insertion in the medical image. The cover image is divided in blocks of 8x8, in each we insert 1-bit of the encrypted watermark in the hybrid transform domain by applying respectively the 2D-LWT (Lifting wavelet transforms), the 2D-DCT (discrete cosine transforms), and the SVD (singular value decomposition). The scheme is tested by applying various attacks such as noise, filtering and compression. Experimental results show that no visible difference between the watermarked images and the original images and the test against attack shows the good robustness of the proposed algorithm.

A Design of PRESENT Crypto-Processor Supporting ECB/CBC/OFB/CTR Modes of Operation and Key Lengths of 80/128-bit (ECB/CBC/OFB/CTR 운영모드와 80/128-비트 키 길이를 지원하는 PRESENT 암호 프로세서 설계)

  • Kim, Ki-Bbeum;Cho, Wook-Lae;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.6
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    • pp.1163-1170
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    • 2016
  • A hardware implementation of ultra-lightweight block cipher algorithm PRESENT which was specified as a standard for lightweight cryptography ISO/IEC 29192-2 is described. The PRESENT crypto-processor supports two key lengths of 80 and 128 bits, as well as four modes of operation including ECB, CBC, OFB, and CTR. The PRESENT crypto-processor has on-the-fly key scheduler with master key register, and it can process consecutive blocks of plaintext/ciphertext without reloading master key. In order to achieve a lightweight implementation, the key scheduler was optimized to share circuits for key lengths of 80 bits and 128 bits. The round block was designed with a data-path of 64 bits, so that one round transformation for encryption/decryption is processed in a clock cycle. The PRESENT crypto-processor was verified using Virtex5 FPGA device. The crypto-processor that was synthesized using a $0.18{\mu}m$ CMOS cell library has 8,100 gate equivalents(GE), and the estimated throughput is about 908 Mbps with a maximum operating clock frequency of 454 MHz.

Design and Analysis of Data File Protection based on the Stream Cipher (데이터파일의 보호를 위한 스트림 암호방식 설계와 해석)

  • 이경원;이중한;김정호;오창석
    • The Journal of the Korea Contents Association
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    • v.4 no.1
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    • pp.55-66
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    • 2004
  • Recently, as the personal computers are supplied rapidly, they formed the nucleus of the computer system. But, because of the easiness that anyone uses them to go near easily, it is the fact that the security of personal computer is weakness. So, in the paper, 1 propose the technical method that minimizes the loss and leakage of important data. This paper implemented a crypto system for security of data file on personal computer and assistance storage medium. The way of encryption/decryption is applied by complexity method which mixed Diffie-Hellman key exchange protocol, a typical RC4(Rivest Cipher version 4) algorithm of stream cipher and a typical MD5(Message Digest version 5) of Hash Function. For valuation implemented crypto system, three criteria is presented, which are crypto complexity, processing time and pattern matching. And according to analysis the three criteria the crypto system is verified the security, efficiency and usefulness. The crypto system is programmed with Visual C++ language of Microsoft. And so, as this is software system, we shall have a technical security system at a minimum cost for all personal computer.

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The Transmission Performance Analysis and Security Policy in Tactical Communication Environment (전술통신 환경에서 전송 성능 분석 및 보안 정책)

  • Hong, Jinkeun
    • Journal of Digital Convergence
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    • v.11 no.12
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    • pp.303-309
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    • 2013
  • This paper analyzed about operation environment and policy for US military tactical communication, and security policy and transmission performance of tactical link. It is presented operation communication message and framework, which is supported semi automated force, SINCGARS specification of link layer in operation environment, and analyzed COMSEC policy and application layer security in tactical security policy. Also it analyzed in respect to transmission performance and crypto synchronization detection. Security policy of tactical link and COMSEC is analyzed in respect of crypto device such as AFKDMS, AKMS, RBECS, KIV-7/HSB.

Hardware Implementation of the 3GPP KASUMI crypto algorithm

  • Kim, Ho-Won;Park, Yong-Je;Kim, Moo-Seop;Ryu, Hui-Su
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.317-320
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    • 2002
  • In this paper, we will present the design and implementation of the KASUMI crypto algorithm and confidentiality algorithm (f8) to an hardware chip for 3GPP system. The f8 algorithm is based on the KASUMI which is a block cipher that produces a 64-bit output from a 64-bit input under the control of a 128-bit key. Various architectures (low hardware complexity version and high performance version) of the KASUMI are made with a Xilinx FPGA and the characteristics such as hardware complexity and thor performance are analyzed.

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