• Journal of the Korea Institute of Information Security & Cryptology
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• v.10 no.1
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• pp.89-97
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• 2000

공개키 암호 시스템 중에서 가장 널리 사용되는 RSA 암호 시스템은 키의 분배와 권리가 용이하고, 디지털 서명이 가능한 장점이 있으나, 암호화와 복호화 과정에서 512 비트 이상의 큰 수에 대한 멱승과 모듈라 감소 연산이 요구되기 때문에 처리 속도의 지연이 큰 문제가 되므로 모듈라 멱승 연산의 고속 처리가 필수적이다. 따라서 본 논문에서는 몫을 추정하여 중간 곱의 크기를 제한하는 interleaved 모듈라 곱셈 기법을 이용하여 모듈라 멱승 연산을 수행하는 고속 RSA 암호 칩을 VHDL을 이용하여 모델링하고 Faraday FG7000A 라이브러리를 이용하여 합성하고 타이밍 검증하여 단일 칩 IC로 구현하였다. 구현된 암호 칩은 75,000 게이트 수준으로 합성되었으며, 동작 주파수는 50MHz이고 1회의 RSA 연산을 수행하는데 소요되는 전체 클럭 사이클은 0.25M이며 512비트 당 처리 속도는 102.4Kbit/s였다.

• Journal of information and communication convergence engineering
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• v.20 no.4
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• pp.280-287
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• 2022

Recently, the number of mobile ransomware types has increased. Moreover, the number of cases of damage caused by mobile ransomware is increasing. Representative damage cases include encrypting files on the victim's smart device or making them unusable, causing financial losses to the victim. This study classifies ransomware apps by analyzing several representative ransomware apps to identify trends in the malicious behavior of ransomware. We present a technique for recovering from the damage, from a digital forensic perspective, using reverse engineering ransomware apps to analyze vulnerabilities in malicious functions applied with various cryptographic technologies. Our study found that ransomware applications are largely divided into three types: locker, crypto, and hybrid. In addition, we presented a method for recovering the damage caused by each type of ransomware app using an actual case. This study is expected to help minimize the damage caused by ransomware apps and respond to new ransomware apps.

• KNOM Review
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• v.24 no.2
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• pp.1-12
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• 2021

Recently, research on CBDC (Central Bank Digital Currency) has been actively conducted for various reasons by countries around the world. In addition, with the dazzling development of blockchain technology, blockchain technology is being adopted in CBDC. In this paper, we propose a blockchain-based CBDC system that can be effectively used in the traditional banking system. We also analyze the requirements of CBDC and suggest ways to commercialize CBDC. We present a system design and implementation method, especially in terms of compatibility, interoperability, and privacy.

• Annual Conference of KIPS
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• 2022.05a
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• pp.15-17
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• 2022

사물인터넷 기술이 활성화되면서 원격 접속 및 제어가 가능한 스마트 가전기기의 보급이 증가하고 있다. 이에 따라 스마트 가전 기기의 보안취약점을 이용하여 개인정보 유출, 프라이버시 침해 등 사이버 보안 관련 범죄도 같이 증가하는 추세이다. 최근 저성능 디바이스에서 경량 암호를 이용한 안전성 보장 방안에 대한 연구가 진행 중이나, 저성능 디바이스에서 4K/2160p 이상의 영상 데이터를 실시간으로 암·복호화하는 것은 높은 지연시간을 발생시킨다. 본 연구에서는 하드웨어 기반 암호 알고리즘 가속기를 이용하여 저성능 디바이스에서도 구현 가능한 대용량 영상데이터 실시간 암·복호화 시스템을 제안한다.

• International Journal of Computer Science & Network Security
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• v.23 no.1
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• pp.164-168
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• 2023

As our community has become increasingly dependent on technology, security has become a bigger concern, which makes it more important and challenging than ever. security can be enhanced with encryption as described in this paper by combining RC6 symmetric cryptographic algorithms with RSA asymmetric algorithms, as well as the Vigenère cipher, to help manage weaknesses of RC6 algorithms by utilizing the speed, security, and effectiveness of asymmetric algorithms with the effectiveness of symmetric algorithm items as well as introducing classical algorithms, which add additional confusion to the decryption process. An analysis of the proposed encryption speed and throughput has been conducted in comparison to a variety of well-known algorithms to demonstrate the effectiveness of each algorithm.

• KIPS Transactions on Computer and Communication Systems
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• v.11 no.8
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• pp.249-258
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• 2022

Since the advent of Bitcoin, various virtual assets have been actively traded through virtual asset services of virtual asset exchanges. Recently, security accidents have frequently occurred in virtual asset exchanges, so the government is obligated to obtain information security management system (ISMS) certification to strengthen information protection of virtual asset exchanges, and 56 additional specialized items have been established. In this paper, we compared the domain importance of ISMS and CryptoCurrency Security Standard (CCSS) which is a set of requirements for all information systems that make use of cryptocurrencies, and analyzed the results after mapping them to gain insight into the characteristics of each certification system. Improvements for 4 items of High Level were derived by classifying the priorities for improvement items into 3 stages: High, Medium, and Low. These results can provide priority for virtual asset and information system security, support method and systematic decision-making on improvement of certified items, and contribute to vitalization of virtual asset transactions by enhancing the reliability and safety of virtual asset services.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.11
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• pp.2291-2302
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• 1994

This paper shows the implementation and design of special processor for linearly shift knapsack public key cryptography system. We highten the density of existing knapsack vector and shift the vectors linearly in order to implement the structure of linearly shift knapsack system which has the stronger cryptosystem. As it needs the parallel processing at each path according to the characteristics of this system. we propose the pipelined parallel structure and implement this system into VLSL. Also we evaluate this system and compare with other systems. The processing speed of this system is 550kb/s when dimension is 100. It is possible to use this system at the place of requiring high speed security to enlarge the structure of it.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.24 no.1
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• pp.229-240
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• 2014

With increasing demands for security evaluation of side-channel resistance for crypto algorithm implementations, many equipments are developed at various research institutes. Indeed, commercial products came out for the purpose of evaluation and certification tool of security products. However, various types of security products exclusive a smart card make it difficult to implement a security evaluation system for them. In this paper, we describe implementation and characteristic of the side-channel evaluation boards of the KLA-SCARF, which is the project to develop domestic side-channel evaluation system. This report would be helpful for following researchers who intend to develop side-channel evaluation boards for other security devices.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.529-532
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• 2004

The ECC(Elliptic Curve Cryptogrphics), one of the representative Public Key encryption algorithms, is used in Digital Signature, Encryption, Decryption and Key exchange etc. The key operation of an Elliptic curve cryptosystem is a scalar multiplication, hence the design of a scalar multiplier is the core of this paper. Although an Integer operation is computed in infinite field, the scalar multiplication is computed in finite field through adding points on Elliptic curve. In this paper, we implemented scalar multiplier in Elliptic curve based on the finite field GF($2^{163}$). And we verified it on the Embedded digital system using Xilinx FPGA connected to an EISC MCU. If my design is made as a chip, the performance of scalar multiplier applied to Samsung $0.35 {\mu}m$ Phantom Cell Library is expected to process at the rate of 8kbps and satisfy to make up an encryption processor for the Embedded digital doorphone.

• IEIE Transactions on Smart Processing and Computing
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• v.6 no.2
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• pp.133-139
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• 2017

Vehicles have increasingly evolved and become intelligent with convergence of information and communications technologies (ICT). Vehicle communications (VC) has become one of the major necessities for intelligent vehicles. However, VC suffers from serious security problems that hinder its commercialization. Hence, the IEEE 1609 Wireless Access Vehicular Environment (WAVE) protocol defines a security service for VC. This service includes Advanced Encryption Standard-Counter with CBC-MAC (AES-CCM) for data encryption in VC. A high-speed AES-CCM crypto module is necessary, because VC requires a fast communication rate between vehicles. In this study, we propose and implement an efficient AES-CCM hardware architecture for high-speed VC. First, we propose a 32-bit substitution table (S_Box) to reduce the AES module latency. Second, we employ key box register files to save key expansion results. Third, we save the input and processed data to internal register files for secure encryption and to secure data from external attacks. Finally, we design a parallel architecture for both cipher block chaining message authentication code (CBC-MAC) and the counter module in AES-CCM to improve performance. For implementation of the field programmable gate array (FPGA) hardware, we use a Xilinx Virtex-5 FPGA chip. The entire operation of the AES-CCM module is validated by timing simulations in Xilinx ISE at a speed of 166.2 MHz.