• Title/Summary/Keyword: Cross Capacitance

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Design and Fabrication of CMOS Low-Power Cross-Coupled Voltage Controlled Oscillators for a Short Range Radar (근거리 레이더용 CMOS 저전력 교차 결합 전압 제어 발진기 설계 및 제작)

  • Kim, Rak-Young;Kim, Dong-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.6
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    • pp.591-600
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    • 2010
  • In this paper, three kinds of 24 GHz low-power CMOS cross-coupled voltage controlled oscillators are designed and fabricated for a short-range radar applications using TSMC 0.13 ${\mu}m$ CMOS process. The basic CMOS crosscoupled voltage controlled oscillator is designed for oscillating around a center frequency of 24.1 GHz and subthreshold oscillators are developed for low power operation from it. A double resonant circuit is newly applied to the subthreshold oscillator to improve the problem that parasitic capacitance of large transistors in a subthreshold oscillator can push the oscillation frequency toward lower frequencies. The fabricated chips show the phase noise of -101~-103.5 dBc/Hz at 1 MHz offset, the output power of -11.85~-15.33 dBm and the frequency tuning range of 475~852 MHz. In terms of power consumption, the basic oscillator consumes 5.6 mW, while the subthreshold oscillator does 3.3 mW. The subthreshold oscillator with the double resonant circuit shows relatively lower power consumption and improved phase noise performance while maintaining a comparable frequency tuning range. The subthreshold oscillator with double resonances has FOM of -185.2 dBc based on 1 mW DC power reference, which is an about 3 dB improved result compared with the basic oscillator.

Optically Controlled Silicon MESFET Modeling Considering Diffusion Process

  • Chattopadhyay, S.N.;Motoyama, N.;Rudra, A.;Sharma, A.;Sriram, S.;Overton, C.B.;Pandey, P.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.3
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    • pp.196-208
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    • 2007
  • An analytical model is proposed for an optically controlled Metal Semiconductor Field Effect Transistor (MESFET), known as Optical Field Effect Transistor (OPFET) considering the diffusion fabrication process. The electrical parameters such as threshold voltage, drain-source current, gate capacitances and switching response have been determined for the dark and various illuminated conditions. The Photovoltaic effect due to photogenerated carriers under illumination is shown to modulate the channel cross-section, which in turn significantly changes the threshold voltage, drainsource current, the gate capacitances and the device switching speed. The threshold voltage $V_T$ is reduced under optical illumination condition, which leads the device to change the device property from enhancement mode to depletion mode depending on photon impurity flux density. The resulting I-V characteristics show that the drain-source current IDS for different gate-source voltage $V_{gs}$ is significantly increased with optical illumination for photon flux densities of ${\Phi}=10^{15}\;and\;10^{17}/cm^2s$ compared to the dark condition. Further more, the drain-source current as a function of drain-source voltage $V_{DS}$ is evaluated to find the I-V characteristics for various pinch-off voltages $V_P$ for optimization of impurity flux density $Q_{Diff}$ by diffusion process. The resulting I-V characteristics also show that the diffusion process introduces less process-induced damage compared to ion implantation, which suffers from current reduction due to a large number of defects introduced by the ion implantation process. Further the results show significant increase in gate-source capacitance $C_{gs}$ and gate-drain capacitance $C_{gd}$ for optical illuminations, where the photo-induced voltage has a significant role on gate capacitances. The switching time ${\tau}$ of the OPFET device is computed for dark and illumination conditions. The switching time ${\tau}$ is greatly reduced by optical illumination and is also a function of device active layer thickness and corresponding impurity flux density $Q_{Diff}$. Thus it is shown that the diffusion process shows great potential for improvement of optoelectronic devices in quantum efficiency and other performance areas.

Analysis of Capacitance and Mobility of ZTO with Amorphous Structure (비정질구조의 ZTO 박막에서 커패시턴스와 이동도 분석)

  • Oh, Teresa
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.20 no.6
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    • pp.14-18
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    • 2019
  • The conductivity of a semiconductor is primarily determined by the carriers. To achieve higher conductivity, the number of carriers should be high, and an energy trap level is created so that the carriers can cross the forbidden zone with low energy. Carriers have a crystalline binding structure, and interfacial mismatching tends to make them less conductive. In general, high-concentration doping is typically used to increase mobility. However, higher conductivity is also observed in non-orthogonal conjugation structures. In this study, the phenomena of higher conductivity and higher mobility were observed with space charge limiting current due to tunneling phenomena, which are different from trapping phenomena. In an atypical structure, the number of carriers is low, the resistance is high, and the on/off characteristics of capacitances are improved, thus increasing the mobility. ZTO thin film improved the on/off characteristics of capacitances after heat treating at $150^{\circ}C$. In charging and discharging tests, there was a time difference in the charge and discharging shapes, there was no distinction between n and p type, and the bonding structure was amorphous, such as in the depletion layer. The amorphous bonding structure can be seen as a potential barrier, which is also a source of space charge limiting current and causes conduction as a result of tunneling. Thus, increased mobility was observed in the non-structured configuration, and the conductivity increased despite the reduction of carriers.

Effect of CH4 Concentration on the Dielectric Properties of SiOC(-H) Film Deposited by PECVD (CH4 농도 변화가 저유전 SiOC(-H) 박막의 유전특성에 미치는 효과)

  • Shin, Dong-Hee;Kim, Jong-Hoon;Lim, Dae-Soon;Kim, Chan-Bae
    • Korean Journal of Materials Research
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    • v.19 no.2
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    • pp.90-94
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    • 2009
  • The development of low-k materials is essential for modern semiconductor processes to reduce the cross-talk, signal delay and capacitance between multiple layers. The effect of the $CH_4$ concentration on the formation of SiOC(-H) films and their dielectric characteristics were investigated. SiOC(-H) thin films were deposited on Si(100)/$SiO_2$/Ti/Pt substrates by plasma-enhanced chemical vapor deposition (PECVD) with $SiH_4$, $CO_2$ and $CH_4$ gas mixtures. After the deposition, the SiOC(-H) thin films were annealed in an Ar atmosphere using rapid thermal annealing (RTA) for 30min. The electrical properties of the SiOC(-H) films were then measured using an impedance analyzer. The dielectric constant decreased as the $CH_4$ concentration of low-k SiOC(-H) thin film increased. The decrease in the dielectric constant was explained in terms of the decrease of the ionic polarization due to the increase of the relative carbon content. The spectrum via Fourier transform infrared (FT-IR) spectroscopy showed a variety of bonding configurations, including Si-O-Si, H-Si-O, Si-$(CH_3)_2$, Si-$CH_3$ and $CH_x$ in the absorbance mode over the range from 650 to $4000\;cm^{-1}$. The results showed that dielectric properties with different $CH_4$ concentrations are closely related to the (Si-$CH_3$)/[(Si-$CH_3$)+(Si-O)] ratio.

Interaction of DEMS with H-terminated Si(001) surface : a first principles (DEMS와 H-terminated Si (001) 표면의 상호작용: 제일원리연구)

  • Kim, Dae-Hyun;Kim, Dae-Hee;Park, So-Yeon;Seo, Hwa-Il;Lee, Do-Hyeong;Kim, Yeong-Cheol
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.117-117
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    • 2009
  • 최근 고집적화 구조는 저항(resistance)과 정전용량 (capacitance)에 의한 신호 지연 (RC delay) 증가로 인한 혼선 (cross-talk noise)과 전력소모 (power dissipation)등의 문제를 발생시킨다. 칩 성능에 영향을 미치는 제한인자를 최소화하기 위해서는 저저항 배선 금속과 저유전상수 (low-k)의 층간 절연막 (IMD, intermetal dielectric) 물질이 필요하다. 최근 PECVD (plasma enhanced chemical vapor deposition)를 이용하여 증착시킨 유기살리케이트 (OSG, organosilicate glass)는 가장 유망한 저유전상수 물질로 각광받고 있다. 본 연구에서는 제일원리 연구를 통하여 OSG의 전구체 중에 하나인 DEMS 문자를 모델링하고, 에너지적으로 가장 안정한 구조를 찾아서 각 원자 간의 결합에 따른 해리에너지 (dissociation energy)를 계산하고, DEMS가 H-terminated Si 표면과 반응하는 기구에 대해 고찰하였다. 최적화된 DEMS 분자의 구조를 찾았고 DEMS 분자가 결합이 깨져 조각 분자군으로 될 때의 에너지들을 계산하였다. 계산된 해리에너지로부터 DEMS 분자의 O 원자와 C분자의 결합이 깨져서 $C_2H_5$를 조각 분자군으로 생성할 확률이 총 8가지의 경우에서 가장 높다는 것을 알 수 있었다. 8 가지의 해리된 DEMS 조각 분자군들이 H-terminated Si 표면과 반응할 때의 반응에너지를 계산한 결과 표면의 Si 원자와 DEMS 분자에서 $C_2H_5$가 해리되어 생성된 조각 분자군의 O 원자가 결합을 하고 부산물로 $C_2H_6$를 생성하는 반응이 가장 선호된다는 것을 알 수 있었다. DEMS 분자로 증착시킨 OSG에 대하여 제일원리법을 이용하여 계산한 연구는 보고된 바 없기 때문에, DEMS 분자의 각 원자 간의 해리에너지와 Si 기판과의 반응에너지는 추후 연구개발의 중요한 기초 자료가 될 수 있다.

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Surface Modification and Heat Treatment of Ti Rod by Electro Discharge (전기방전에 의한 Ti rod의 열처리 및 표면개질 특성에 관한 연구)

  • Byun, C.S.;Oh, N.H.;An, Y.B.;Cheon, Y.W.;Kim, Y.H.;Cho, Y.J.;Lee, C.M.;Lee, W.H.
    • Korean Journal of Materials Research
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    • v.16 no.3
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    • pp.168-172
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    • 2006
  • Single pulse of 2.0 to 3.5 kJ from $150{\mu}F$ capacitor was applied to the cp Ti rod for its surface modification and heat treatment. Under the conditions of using 2.0 and 2.5 kJ of input energy, no phase transformation has been occurred. However, the hardness and tensile strength decreased and the elongation increased after a discharge due to a slight grain growth. By using more than 3.0 kJ of input energy, the electro discharge made a phase transformation and the hardness at the edge of the cross section increased significantly. The Ti rod before a discharge was lightly oxidized and was primarily in the form of $TiO_2$. However, the surface of the Ti rod has been instantaneously modified by a discharge into the main form of TiN from $TiO_2$. Therefore, the electro discharge can modify its surface chemistry in times as short as $200{\mu}sec$ by manipulating the input energy, capacitance, and discharging environment.

A Study on the Dielectric Characteristics and Microstructure of $Si_3N_4$ Metal-Insulator-Metal Capacitors ($Si_3N_4$를 이용한 금속-유전체-금속 구조 커패시터의 유전 특성 및 미세구조 연구)

  • 서동우;이승윤;강진영
    • Journal of the Korean Vacuum Society
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    • v.9 no.2
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    • pp.162-166
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    • 2000
  • High quality $Si_3N_4$ metal-insulator-metal (MIM) capacitors were realized by plasma enhanced chemical vapor deposition (PECVD). Titanium nitride (TiN) adapted as a diffusion barrier reduced the interfacial reaction between $Si_3N_4$ dielectric layer and aluminum metal electrode showing neither hillock nor observable precipitate along the interface. The capacitance and the current-voltage characteristics of the MIM capacitors showed that the minimum thickness of $Si_3N_4$ layer should be limited to 500 $\AA$ under the present process, below which most of the capacitors were electrically shorted resulting in the devastation of on-wafer yield. According to the transmission electron microscopy (TEM) on the cross-sectional microstructure of the capacitors, the dielectric breakdown was caused by slit-like voids formed at the interface between TiN and $Si_3N_4$ layers when the thickness of $Si_3N_4$ layer was less than 500 $\AA$. Based on the calculation of thermally-induced residual stress, the formation of voids was understood from the mechanistic point of view.

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Characteristics of Plasma Polymer Thin Films for Low-dielectric Application

  • Cho, S.J.;Boo, J.H.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.124-124
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    • 2011
  • This study investigated the interaction of varied plasma power with ultralow-k toluene-tetraethoxysilane (TEOS) hybrid plasma polymer thin films, as well as changing electrical and mechanical properties. The hybrid thin films were deposited on silicon(100) substrates by plasma enhanced chemical vapor deposition (PECVD) system. Toluene and tetraethoxysilane were utilized as organic and inorganic precursors. In order to compare the electrical and the mechanical properties, we grew the hybrid thin films under various conditions such as rf power of plasma, bubbling ratio of TEOS to toluene, and post annealing temperature. The hybrid plasma polymer thin films were characterized by Fourier transform infrared (FT-IR) spectroscopy, atomic force microscopy (AFM), nanoindenter, I-V curves, and capacitance. Also, the hybrid thin films were analyzed by using ellipsometry. The refractive indices varied with the RF power, the bubbling ratio of TEOS to toluene, and the annealing temperature. To analyze their trends of electrical and mechanical properties, the thin films were grown under conditions of various rf powers. The IR spectra showed them to have completely different chemical functionalities from the liquid toluene and TEOS precursors. Also, The SiO peak intensity increased with increasing TEOS bubbling ratio, and the -OH and the CO peak intensities decreased with increasing annealing temperature. The AFM images showed changing of surface roughness that depended on different deposition rf powers. An nanoindenter was used to measure the hardness and Young' modulus and showed that both these values increased as the deposition RF power increased; these values also changed with the bubbling ratio of TEOS to toluene and with the annealing temperature. From the field emission scanning electron microscopy (FE-SEM) results, the thickness of the thin films was determined before and after the annealing, with the thickness shrinkage (%) being measured by using SEM cross-sectional images.

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Operation Frequency Dependence of Output of Orthogonal Fluxgate Sensor Fabricated with Ferrite Core (페라이트 코어를 이용하여 제작한 직교형 플럭스게이트 센서의 감도에 미치는 구동주파수의 영향)

  • Shin, Kwang-Ho
    • Journal of the Korean Magnetics Society
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    • v.22 no.6
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    • pp.200-203
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    • 2012
  • In this study, we have investigated that the operation frequency dependences of the output properties of the orthogonal fluxgate sensor which was fabricated with a ferrite core. An orthogonal fluxgate sensor should be operated in as high as possible frequency to enhance its sensitivity in the case of small sized sensor, because sensitivity of the sensor is proportional to cross section area, winding number and operation frequency. In this study, we investigated the correspondence of the frequency dependence of output and the reactance (inductance and capacitance) of pickup coil and cable. Experimental results represented that we could obtain maximum output (= sensitivity) at optimal frequency which is near LC resonance frequency of the pickup coil and cable.

A Design of 1.42 - 3.97GHz Digitally Controlled LC Oscillator (1.42 - 3.97GHz 디지털 제어 방식 LC 발진기의 설계)

  • Lee, Jong-Suk;Moon, Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.7
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    • pp.23-29
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    • 2012
  • The LC-based digitally controlled oscillator (LC-DCO), a key component of the all digital phase locked loop (ADPLL), is designed using $0.18{\mu}m$ RFCMOS process with 1.8 V supply. The NMOS core with double cross-coupled pair is chosen to realize wide tuning range, and the PMOS varactor pair that has small capacitance of a few aF and the capacitive degeneration technique to shrink the capacitive element are adopted to obtain the high frequency resolution. Also, the noise filtering technique is used to improve phase noise performance. Measurement results show the center frequency of 2.7 GHz, the tuning range of 2.5 GHz and the high frequency resolution of 2.9 kHz ~7.1 kHz. Also the fine tuning range and the current consumption of the core could be controlled by using the array of PMOS transistors using current biasing. The current consumption is between 17 mA and 26 mA at 1.8V supply voltage. The proposed DCO could be used widely in various communication system.