• JSTS:Journal of Semiconductor Technology and Science
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• 제4권2호
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• pp.88-93
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• 2004

We, for the first time, present novel test patterns and conclusive on-chip data indicating that the variation of coupling capacitance, ${\Delta}C_C$ by crosstalk can be larger than static coupling capacitance, $C_C$. The test chip is fabricated using a generic 150 nm CMOS technology with 7 level metallization. It is also shown that ${\Delta}C_C$ is strongly dependent on the phase of aggressive lines. For antiphase crosstalk ${\Delta}C_C$ is always larger than $C_C$ while for in-phase crosstalk $D_{\Delta}C_C$is smaller than $C_C$.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권1호
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• pp.53-58
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• 2012

A new on-wafer de-embedding method using thru, short and open patterns sequentially is proposed to eliminate the errors of conventional methods. This "thru-short-open" method is based on the removal of the coupling admittance between input and output interconnect dangling legs. The increase of the de-embedding effect of the lossy coupling capacitance on the cutoff frequency in MOSFETs is observed as the gate length is scaled down to 45 nm. This method will be very useful for accurate RF measurements of nano-scale MOSFETs.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 추계학술대회 논문집
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• pp.557-560
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• 1999

The design of large area thin film transistor liquid crystal displays (TFT-LCDs) requires consideration of cross-talks between the data lines and pixel electrodes. These limits are imposed by the parasitic capacitive elements present in a pixel. The capacitive coupling of the data line signal onto the pixel causes a pixel voltage error. In this study semi-empirical capacitance model which is adopted from VLSI interconnection capacitance calculations was used to calculate mutual coupling capacitances. With calculated mutual coupling capacitances and given image pattern, the root mean square(RMS) voltage of pixel is calculated to see vertical cross-talk from the first to the last column. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

• 한국전기전자재료학회논문지
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• 제25권12호
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• pp.949-954
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• 2012

The K-PCS and W-CDMA dual band dielectric duplexer and bandpass filters have been designed and fabricated. The dual band duplexer consists of the separate monoblock K-PCS and W-CDMA duplexers using common antenna port. The coupling capacitance and I/O impedance matching have been designed to minimize the cross interference between the bands. Isolations of crosspoint between Tx and Rx in K-PCS and W-CDMA dualband were about 47 dB and 100 dB, respectively. On the other hand, isolations of Tx and Rx in K-PCS and W-CDMA were about 66 dB and 65 dB, respectively. The difference between 47 dB and 100 dB originated from the different center frequencies in Tx and Rx of K-PCS and W-CDMA bands. The coupling capacitance of the bandwidth, I/O capacitance of I/O matching and impedance matching, and various capacitances were important role to fabricate the dielectric duplexer and bandpass filters.

• 한국초전도ㆍ저온공학회논문지
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• 제23권4호
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• pp.6-9
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• 2021

Superconducting coplanar waveguide (SCPW) resonators with high quality (Q) factor are widely used for developing quantum sensors and quantum information processors. Here we conducted numerical simulations of SCPW resonators to investigate the relationship between the Q factor and the coupling capacitance of the resonator. Varying the geometrical shape of both ends and coupling parameters of the SCPW resonator resulted in a change of the coupling capacitances and the Q factor as well. Our calculation results indicate that the performance of the SCPW resonator is highly sensitive to the capacitive coupling and searching for an optimal coupling condition would be crucial for developing high-performance SCPW resonator.

• 한국정보처리학회논문지
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• 제4권8호
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• pp.2143-2151
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• 1997

대규모 집적회로의 공정 기술의 발달로 전선 간의 간격이 가까와 짐에 따라서, 전선 간에 발생하는 결합 캐패시턴스가 접지 캐패시턴스에 비하여 급격히 증가하게 되었다. 그에 따라, 레이아웃의 설계과정에서 결합 캐패시턴스로 유발되는 혼신을 중요한 요인으로 고려할 필요가 있게 되었다. 본 논문에서는 3개 이상의 배선 층을 사용하는 배선 영역, 특히 채널 배선 영역에서 혼신을 최소화시킬 수 있는 배선 층 할당 방법을 다룬다. 제안된 방법은 배선 층 할당 문제를 0/1 정수 선형 프로그래밍 문제로 형식화하여 해결하는 것이다. 또한, 비용 함수에 대한 상한을 추정함으로써 효율을 향상시키는 방법을 제안한다. 실험을 통하여 제안된 방법이 혼신을 효과적으로 개선함을 보인다.

• 전력전자학회논문지
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• 제23권4호
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• pp.286-289
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• 2018

This paper tests the feasibility of using the transparent electrode as the electrode of the capacitor in order to use the vehicle glass of the electric vehicle for a capacitive coupling wireless transfer (CCWPT). Large coupling capacitance can be obtained due to large area and high permittivity using the glasses of an electric vehicle. However, if an electrode is formed on a metal such as copper, then a view cannot be guaranteed and a transparent electrode can pose a solution. Therefore, the coupling capacitor is implemented by forming a glass dielectric with an ITO transparent electrode on one side through a semiconductor deposition process. The loss of the coupling capacitor is investigated, and a 200 W CCWPT prototype is fabricated and tested for its characteristics and power transfer.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2017년도 춘계학술대회
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• pp.529-530
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• 2017

Junctionless FET(JLFET)로 구성된 적층형 3차원 인버터의 전기적 상호작용을 연구하였다. Inter Layer Dielectirc (ILD) 두께에 따른 상단 JLFET의 $N_{gate}-N_{gate}$ 정전용량과 전달 컨덕턴스의 특성 변화를 하단 JLFET 게이트 전압에 따라서 조사하였다. 상단과 하단 JLFET 사이 간격이 수십 nm 인 적층형 구조를 사용할 때에 두 트랜지스터의 거리에 따른 AC 전기적인 상호작용을 고려해야 한다.

• Journal of Electrical Engineering and Technology
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• 제11권6호
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• pp.1656-1663
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• 2016

A capacitive wireless power transfer (C-WPT) system uses an electric field to transmit power through a physical isolation barrier which forms a pair of ac link capacitors between the metal plates. However, the physical dimension and low dielectric constant of the interface medium severely limit the effective link capacitance to a level comparable to the main switch output capacitance of the transmitting circuit, which thus narrows the soft-switching range in the light load condition. Moreover, by fundamental limit analysis, it can be proved that such a low link capacitance increases operating frequency and capacitor voltage stress in the full load condition. In order to handle these problems, this paper investigates optimal design of double matching transformer networks for C-WPT. Using mathematical analysis with fundamental harmonic approximation, a design guideline is presented to avoid unnecessarily high frequency operation, to suppress the voltage stress on the link capacitors, and to achieve wide ZVS range even with low link capacitance. Simulation and hardware implementation are performed on a 5-W prototype system equipped with a 256-pF link capacitance and a 200-pF switch output capacitance. Results show that the proposed scheme ensures zero-voltage-switching from full load to 10% load, and the switching frequency and the link capacitor voltage stress are kept below 250 kHz and 452 V, respectively, in the full load condition.

• 센서학회지
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• 제19권5호
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• pp.391-397
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• 2010

This paper proposes a differential structure sensor for detecting Ringer's solution exhaustion, in which three C-type electrodes of 10 mm width are disposed on a ringer hose at a distance of 5 mm each other in the direction of Ringer's solution flow. In the center of middle electrode, two capacitances are formed at the proposed sensor. When ringer hose is filled with Ringer's solution, there is no difference between two capacitances. But capacitance difference exist under the Ringer's solution shortage, because the shortage causes the hose filled with air from the top position electrode. The capacitance difference got to maximum 1.81 pF, when air was filled between top and middle electrode and the last of hose was filled with 10 % dextrose injection Ringer's solution. The capacitance difference varied with hose-wraparound coverage of electrodes as well as the width of them. For hose-wraparound electrode coverage of 90 % and 70 %, the maximum capacitance difference was 1.81 pF and 1.56 pF, respectively. A differential charge amplifier converted the capacitance difference to electric signal, and minimized electrodes' adhering problem and external noise coupling problem.