• 전력전자학회논문지
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• 제21권4호
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• pp.320-327
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• 2016

We propose a multi-channel current-balancing single switch light-emitting diode (LED) driver for a 3D TV. Conventional LED drivers require non-isolated DC/DC converters as many as the number of LED channels, whereas the proposed LED driver needs only one power switch and several balancing capacitors instead of expensive non-isolated DC/DC converters. Therefore, the proposed driver features a simple structure with low cost and high efficiency. In particular, because its power switch can be turned off under the zero-current switching condition, the proposed driver has desirable advantages, such as improved electromagnetic interference characteristics and high efficiency. Moreover, it only uses a small number of DC blocking capacitors with no additional active devices for the current balancing of multi-channel LEDs. Therefore, the proposed driver exhibits high reliability and cost effectiveness. To confirm the validity of the proposed driver, we perform a theoretical analysis and present design considerations and experimental results obtained from a prototype that is applicable to a 46" LED TV.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2007년도 하계학술대회 논문집
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• pp.159-162
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• 2007

Comparative study on a low cost sustaining driver with single and dual path energy recovery circuits for plasma display panels (PDPs) is shown in this paper. The cost of PDPs has been still high and about half of the cost has been occupied by driving circuit. A simple sustaining driver is proposed to reduce the cost and size of driving circuit. The proposed driver has small number of devices and reactive components and there are two methods for charging and discharging PDPs such as single and dual path energy recovery circuits. A comparative research on two-types of energy recovery path is practiced to evaluate performance. As a result, the dual energy recovery path circuit has low power consumption, low surge current and high performance. To verify those results, experiment will be shown with 42-inch HD panel.

• 대한안전경영과학회지
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• 제16권3호
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• pp.451-469
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• 2014

The purpose of this study is to implement and develop the integrated Economic Value Added (EVA) and Time-Driven Activity-Based Costing (TDABC) model to seek both improvement of Net Operating Profit Less Adjusted Tax (NOPLAT) and reduction of Capital Charge (CC). Net Operating Profit Less Adjusted Tax (NOPLAT) can be maximized by reducing the indirect cost of an unused resource capacity increased by Cost Capacity Ratio (CCR) of TDABC. On the other hand, Capital Charge (CC) can be minimized by improving the efficiency of Invested Capital (IC) considered by Weighted Average Cost of Capital (WACC) of EVA. In addition, the integrated system of TDABC using Balance Scorecard (BSC) and EVA is developed by linking between the lagging indicators and the three leading indicators. The three leading indicators include customer, internal process and growth and learning perspectives whereas the lagging indicator includes NOPLAT and CC in terms of financial perspective. When the Critical Success Factor (CSF) of BSC is cascading as a cause and an effect relationship, time driver of TDABC and capital driver of EVA can be used efficiently as Key Performance Indicator (KPI) of BSC. For a better understanding of the proposed EVA/TDABC model and BSC/EVA/TDABC model, numerical examples are derived from this paper. From the proposed model, the time driver of TDABC and the capital driver of EVA are known to lessen indirect cost from comprehensive income statement when increasing the efficiency of operating IC from the statement of financial position with unified KPI cascading of aligned BSC CSFs.

• 한국산업정보학회논문지
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• 제18권3호
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• pp.1-8
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• 2013

본 논문에서는 최근 3D 콘텐츠의 증가로 다시 주목을 받고 있는 PDP TV를 위한 저가형 구동 시스템을 제안한다. PDP TV의 경우 기체 방전을 이용하여 영상을 표시하는 장치로서 진공 상태의 패널에 수많은 전압을 가하여 플라즈마 상태로 만든 다음 영상 신호에 의하여 영상 및 밝기가 표현된다. 이러한 PDP TV는 많은 전압을 가하기 위하여 3개 전극에 각각 필요한 구동회로 보드가 붙게 되는데, 대 전력을 다루기 때문에 보드 사이즈와 사용되는 소자가 큰 가격을 차지하고 있다. 본 논문에서는 기존의 3개의 보드로 이루어진 구동 시스템을 오방전을 보상하기 위한 어드레스 에너지 회수 구동회로를 포함한 2개 보드로 이루어진 새로운 저가형 PDP TV 구동회로를 제안하고 이를 42인치 HD PDP TV를 통해 검증한다.

• 전력전자학회논문지
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• 제11권2호
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• pp.120-126
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• 2006

본 논문에서는 Multi-level PDP 구동회로의 Sustain 스위치를 구동하기 위해 Boot-strap chain 방식의 Gate driver를 제안한다. 제안된 Gate driver는 한 개의 High-side N-MOSFETS를 구동하기 위해 별도의 Floating power supply 가 필요치 않고 한 쌍의 다이오드와 캐패시터만을 사용한다. 제안 Gate driver 회로를 적용함으로서, Multi-level PDP driver의 가격과 무게 및 부피를 줄일 수 있다.

• 대한전자공학회논문지SD
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• 제40권7호
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• pp.474-480
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• 2003

We designed and tested a new scan driver output stage. Compared to conventional CMOS structured scan driver IC′s, the new NMOSFET-only scan driver circuit can reduce the chip area and therefore, the chip cost considerably. We confirmed the circuit operation with open drain power NMOSFET IC′s by driving 2"PDP test panel. We defined critical device parameters and their optimization methods lot the best circuit performance.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2000년도 춘계학술대회 논문집
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• pp.202-209
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• 2000

This paper introduces the main function and protection method of IGBT gate driver that designed by KOROS. Recently, the applications of insulated gate bipolar transistors(IGBTs) have expanded widely, particularly in the area of railway converters. This driver is suitable for railway traction applications, so they are designed for circumstance of railway vehicle such as vibration. The input control power for this driver is supplied from battery charger of railway. it is no necessary an isolated power supply board or auxiliary power supply, with substantial savings in cost and space in railway applications. This gate driver can be used wide range of input voltage. So, performance of the driver has no relation with the battery voltage(70V∼110V). The protection methods of IGBT gate driver have many kind of ways, but this gate driver it designed to apply to converter for railway system, so this gate driver includes protection for arm short current and low control power voltage, etc. And the process of protection method and protection reference value are optimized by means of sufficient test with our own facilities.

• Journal of Power Electronics
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• 제13권5호
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• pp.779-786
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• 2013

A highly efficient sustaining driver is proposed for plasma display panels (PDPs). When the PDP is charged and discharged, the proposed sustaining driver employs an address voltage source used in an addressing period. A voltage source is used for fully charging the panel to the sustaining voltage, and an initial inductor current helps the panel discharge to 0 V. The resonance between the panel and an inductor is made by shifting the voltage and current bias level when charging and discharging the panel. As a result, the proposed circuit can reduce power consumption, switching loss, heat dissipation, and production cost. Experimental results of a 42-inch PDP are provided to verify the operation and features of the proposed circuit.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2008년도 추계학술대회 논문집
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• pp.101-104
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• 2008

This paper is a report of designing for LED lights driver unit. The main purpose of driver designing is high electrical efficient performance and intelligent control LED driver. This LED driver can be used for intelligent light control. This product expects to improve the light control by dimming instead of interlace on/off light control that increases the social cost such as car accidents and etc.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.947-950
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• 1999

The PLD design of new scheme LCD driver circuit is described in this paper. A new scheme LCD driver circuit doesn't used microprocessor for the convenience of users. A new scheme LCD driver circuit consists of 4 main parts, that is, a serial/parallel communication control block part, a LCD controller part, a LCD driver part and a RAM/ROM control block part. The validity and efficiency of the proposed LCD driver circuit have been verified by simulation and by ALTERA EPM7192SQC160-15 PLD implementation in VHDL. After comparing this LCD driver circuit to specify it was verified that the developed LCD driver circuit showed has good performances, such as low cost, convenience of users.