• Title/Summary/Keyword: Core simulation

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A Study of Flow Induced Noise for Multilayered Cylinder due to Turbulent Boundary Layer (난류경계층에 의한 다층재질 원통형 실린더의 유체소음 해석 연구)

  • 신구균;홍진숙;이헌곤
    • Journal of KSNVE
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    • v.6 no.5
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    • pp.671-677
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    • 1996
  • This paper presents the analytical method for predicting turbulence- induced noise in the multilayered cylinder composed of an outer hose, an inner fluid and an internal core. It is assumed that an infinite axisymmetric cylinder is located horizontally in water with free stream velocity and the turbulent boundary layer (TBL) surrounding the outer hose is fully developed and homogeneous. The transfer function at the core surface due to the propagation of the pressure fluctuation within the TBL is formulated using the linearized Navier-Stockes equation for solid and fluid. In the estimation of the energy spectrum of wall pressure fluctuation, the empirical formula proposed by Strawderman based on the Corcos model is used. A general algorithm for the calculation of the pressure level at the surface of a core, that is, turbulence- induced noise, is presented. Through the detailed numerical simulation, it is found that the major noise mechanism is the propagation of the bulge wave along hose.

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Analysis of an Integrated PFC Inductor and Resonant Transformer Based on Magnetic Modeling (통합된 PFC 인덕터와 공진변압기의 자기모델링 연구)

  • Meas, S.;Phum, S.;Kim, E.S;Jeon, Y.S;Won, J.S;Kim, D.H;Huh, D.Y
    • Proceedings of the KIPE Conference
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    • 2012.11a
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    • pp.85-87
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    • 2012
  • This paper describes the design and analysis of an integrated transformer magnetic core which comprises of two different power cores with PFC inductor and LLC resonant transformer magnetic cores. The equivalent magnetic circuit modeling approach is employed to analyze the variations in coupling coefficient and inductance in terms of air gaps under the operations of the respective power core. Simulation and experimental studies are performed with a fabricated prototype integrated core and their results are discussed.

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A study on the design of a 32-bit ALU (32비트 ALU 설계에 대한 연구)

  • 황복식;이영훈
    • Journal of the Korea Society of Computer and Information
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    • v.7 no.4
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    • pp.89-93
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    • 2002
  • This paper describes an ALU core which is suitable for 32-bit DSP This ALU operates in 32-bit data and occupies the third stage, execution, among 5 stage pipeline structure. The supplied functions of the ALU are arithmetic operations, logical operations, shifting, and so on. For the implementation of this ALU core, each functional block is described by HDL. And the functional verification of the ALU core is performed through HDL simulation. This ALU is designed to use the 32-bit DSP.

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A design of 16-bit adiabatic Microprocessor core

  • Youngjoon Shin;Lee, Hanseung;Yong Moon;Lee, Chanho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.4
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    • pp.194-198
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    • 2003
  • A 16-bit adiabatic low-power Micro-processor core is designed. The processor consists of control block, multi-port register file and ALU. A simplified four-phase clock generator is designed to provide supply clocks for adiabatic processor. All the clock line charge on the capacitive interconnections is recovered to recycle the energy. Adiabatic circuits are designed based on ECRL(efficient charge recovery logic) and $0.35\mu\textrm$ CMOS technology is used. Simulation results show that the power consumption of the adiabatic Microprocessor core is reduced by a factor of 2.9~3.1 compared to that of conventional CMOS Microprocessor

Performance Analysis of Shared Buffer Router Architecture for Low Power Applications

  • Deivakani, M.;Shanthi, D.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.6
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    • pp.736-744
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    • 2016
  • Network on chip (NoC) is an emerging technology in the field of multi core interconnection architecture. The routers plays an essential components of Network on chip and responsible for packet delivery by selecting shortest path between source and destination. State-of-the-art NoC designs used routing table to find the shortest path and supports four ports for packet transfer, which consume high power consumption and degrades the system performance. In this paper, the multi port multi core router architecture is proposed to reduce the power consumption and increasing the throughput of the system. The shared buffer is employed between the multi ports of the router architecture. The performance of the proposed router is analyzed in terms of power and current consumption with conventional methods. The proposed system uses Modelsim software for simulation purposes and Xilinx Project Navigator for synthesis purposes. The proposed architecture consumes 31 mW on CPLD XC2C64A processor.

The Structure and Short Circuit Analysis of Saturable Magnetic Core Superconducting Fault Current Limiter (자기 포화형 고온 초전도 한류기의 구조 및 단락특성에 관한 연구)

  • 최석진;이승제;이찬주;이상진;현옥배;고태국
    • Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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    • 2000.02a
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    • pp.154-157
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    • 2000
  • Superconducting tape easily can applied to distribution of electricity. It designs basic model of Saturable Reactor type Fault Current Limiter which used superconducting tape, and observes a specific character by means of simulation. Saturable Reactor type Fault Current Limiter is not influenced by saturation of Magnet core appeared in Induction Fault Current Limiter, because it exploit saturation of Iron core. But, it is possible that superconducting tape quenched when AC current flow to superconducting tape which biased DC voltage.

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Analysis of Iron Loss in a Wound Core Type Transformer by FEM (유한요소법에 의한 권철심변압기의 철손해석)

  • Kwon, B.I.;Kim, S.Y.
    • Proceedings of the KIEE Conference
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    • 1995.11a
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    • pp.21-23
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    • 1995
  • The analysis of the thin lamination model of the wound core type transformer by FEM requires many region division and much calculationg time, and it has difficulty in calculation by modem computer. A new method which is simulated by a solid but anisotropic block with the magnetic permeabilities in the orthogonal dimension, is selected to account for the presence of the lamination.[1] Based on this equivalent anisotropic block model, we analyze the iron loss of the wound core type transformer by FEM, and compare the simulation results with the experimental results.

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DC-DC Converter Using Air Core Reactor (공심 리액터를 이용한 DC-DC 컨버터)

  • Ju, Hong-Ju;Lee, Hwa-Chun;Kim, Se-Min;Nam, Hae-Kon;Park, Sung-Jun
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.918-919
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    • 2008
  • This paper deals with the DC-DC converter with high efficiency using the minimum reactor. In this paper, the proposed convert uses the air core reactor for ZCS(zero currunt switching) which can minimize the core losses and removes the over switching losses by soft switching. The proposed converter is verified by the modes analysis and computer simulation to prove the theoretical background and adequacy.

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Migration of THO & Np in a Fractured Granite Core at Deep Underground Laboratory

  • PARK Chung-Kyun;CHO Won-Zin;HAHN Pil-Soo;KIENZLER B.
    • Proceedings of the Korean Radioactive Waste Society Conference
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    • 2005.06a
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    • pp.255-263
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    • 2005
  • Migration experiments of THO and 237Np have performed through a sampled granite core in Chemlab2 probe at the Aspo hard Rock laboratory. The elution curves of THO were analysed to determine hydraulic properties such as the extent of dispersion effect according to flow rates. The retardation phenomena of the solutes were observed and described with elution curves and migration plumes. After migration test, the rock core was opened, and the remaining radioactivities on the rock fracture surfaces were measured. The transport process was simulated with a two-dimensional channel model. The mass transport process was described with three types of basic processes ; advection, sorption and matrix diffusion. By the combination of these processes, effects of each process on transport were described in terms of elution curves and migration plumes. By comparing the simulation results to the experimental one, it was possible to analyse the retardation effect quantitatively.

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Improved Linearity and Saturation of Current Sensor by Laminating Silicon Steel and Fermalloy (퍼멀로이와 실리콘스틸의 적층 통한 전류센서의 선형성 및 포화도 개선)

  • Shin, Jung-Won;Choi, Bong-Seok;Ha, Yeong-Ho
    • Journal of Sensor Science and Technology
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    • v.24 no.3
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    • pp.194-201
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    • 2015
  • The current sensor is used in industrial devices and power utilities. Core materials of these current sensors are divided into mainly two groups as silicon steel and fermalloy. Silicon steel has a wide saturation bandwidth but low sensitivity during low-current, whereas permalloy has a short saturation bandwidth but high sensitivity during low-current. In this paper, laminated silicon steel and permalloy by equal ratio is proposed to improve the linearity and saturation of current sensor. It is proved that the proposed core material has larger bandwidth than fermalloy as well as higher sensitivity than silicon steel. When comparing simulation results by FLUX 3D, the proposed method has also better performance than the previous core materials.