• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.6
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• pp.34-42
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• 2000

Recently, there is a growing need to develope small-size RF chip inductors operating to GHz to realize high-performance, micro-fabricated wireless communication products. For the development of high-performance RF chip inductors, however, the ferrite-based chip inductors can not be used above 300MHz due to the limitation of the permeability of this material. In this work, small-size, high-performance RF chip inductors utilizing amorphous $Al_2O_3$ core material were investigated. Copper (Cu) with 40${\mu}m$ diameter was used as the coils and the chip inductor size fabricated in this work is $2.1mm{\times}1.5mm{\times}1.0mm$. The external current source was applied after bonding Cu coil leads to gold pads electro-plated on the bottom edges of a core material. The composition of core materials was measured using a EDX. High frequency characteristics of the inductance (L), quality factor (Q), and impedance (Z) of developed inductors were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). The developed inductors have the self-resonant frequency (SRF) of 1 to 3.5 GHz and exhibit L of 22 to 150 nH. The L of the inductors decreases with increasing the SRF. The Z of the inductors has the maximum value at the SRF and the inductors have the quality factor of 70 to 97 in the frequency range of 500 MHz to 1.5 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.5
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• pp.336-343
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• 2018

We herein present the design and fabrication of a Rx core chip operating in the X-band (10.5~13 GHz) using Win's commercial $0.25-{\mu}m$ GaAs pHEMT process technology. The X-band core chip comprises a low-noise amplifier, a four-bit phase shifter, and a serial-to-parallel data converter. The size is $1.75mm{\times}1.75mm$, which is the state-of-the-art size. The gain and noise figure are more than 10 dB but less than 2 dB, and both the input and output return losses are less than 10 dB. The RMS phase error is less than $5^{\circ}$, and the P1dB is 2 dBm at 12.5 GHz, the performance of which is equivalent to other GaAs core chips. The fabricated core chip was packaged in a QFN package type with a size of $3mm{\times}3mm$ for the convenience of assembly. We confirmed that the performance of the packaged core chip was almost the same as that of the chip itself.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.117-120
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• 2001

This paper presents a HW/SW co-design environments and its validation for development of virtual component on the 32-bit RISC core which is used in the design of Information-Appliance-On-a-Chip. For the experimental environment, we developed the cycle-accurate instruction set simulator based on SE3208 RISC core of ADChips. To verify the function of RISC core at the cycle level, we implemented the verification environment by grafting this simulator on the Seamless CVE which is a commercial co-verification environment.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.8 no.2
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• pp.201-206
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• 2007

In this paper, we propose the efficient low power test methodology of NoC(Network-on chip) for the test of core-based systems that use this platform. To reduce the power consumption of transferring data through router channel, the scan vectors are partitioned into flits by channel width. The don't cares in unspecified scan vectors are mapped to binary values to minimize the switching rate between flits. Experimental results for full-scanned versions of ISCAS 89 benchmark circuits show that the proposed method leads to about 35% reduction in test power.

• Korean Journal of Optics and Photonics
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• v.28 no.4
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• pp.135-140
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• 2017

In this paper, we report measured results for an all-fiber $7{\times}1$ pump combiner based on an optical fiber chip for high-power fiber lasers. An optical-fiber chip was fabricated by etching a fiber, having core and cladding diameters of 20 and $400{\mu}m$, in the longitudinal direction. To both ends of the etched chip, we spliced input and output fibers. First, we tied together seven optical fibers, having core and cladding diameters of 105 and $125{\mu}m$ respectively, in a cylindrical bundle and spliced them to the $375-{\mu}m$ end of the optical-fiber chip. Then, we attached an output DCF with core and cladding diameters of 25 and $250{\mu}m$ to the $250-{\mu}m$ end of the optical-fiber chip. Finally, the fabricated $7{\times}1$ pump combiner showed an average optical coupling efficiency of about 90.2% per port. This chip-based pump combiner may replace conventional pump combiners by massive production of fiber chips.

• ETRI Journal
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• v.37 no.1
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• pp.118-127
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• 2015

The power consumption of 3D many-core processors can be reduced, and the power delivery of such processors can be improved by introducing voltage island (VI) design using on-chip voltage regulators. With the dramatic growth in the number of cores that are integrated in a processor, however, it is infeasible to adopt per-core VI design. We propose a 3D many-core processor architecture that consists of multiple voltage clusters, where each has a set of cores that share an on-chip voltage regulator. Based on the architecture, the steady state temperature is analyzed so that the thermal characteristic of each voltage cluster is known. In the voltage scaling and task scheduling stages, the thermal characteristics and communication between cores is considered. The consideration of the thermal characteristics enables the proposed VI formation to reduce the total energy consumption, peak temperature, and temperature gradients in 3D many-core processors.

• IEMEK Journal of Embedded Systems and Applications
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• v.4 no.2
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• pp.55-62
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• 2009

The power consumption of a high-end microprocessor increases very rapidly. High power consumption will lead to a rapid increase in the chip temperature as well. If the temperature reaches beyond a certain level, chip operation becomes either slow or unreliable. Therefore various approaches for Dynamic Thermal Management (DTM) have been proposed. In this paper, we propose a learning based temperature prediction scheme for a multi-core system. In this approach, from repeatedly executing an application, we learn the thermal patterns of the chip, and we control the temperature in advance through DTM. When the predicted temperature may go beyond a threshold value, we reduce the temperature by decreasing the operation frequencies of the corresponding core. We implement our temperature prediction on an Intel's Quad-Core system which has integrated digital thermal sensors. A Dynamic Frequency System (DFS) technique is implemented to have four frequency steps on a Linux kernel. We carried out experiments using Phoronix Test Suite benchmarks for Linux. The peak temperature has been reduced by on average $5^{\circ}C{\sim}7^{\circ}C$. The overall average temperature reduced from $72^{\circ}C$ to $65^{\circ}C$.

• Journal of Biomedical Engineering Research
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• v.37 no.5
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• pp.186-194
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• 2016

In this study, a co-axial flow induced microfluidic chip to fabricate pure collagen type I microfiber via the control of collagen type I and Na-alginate gelation process. The pure collagen type I microfiber was generated by selective degradation of Ca-alginate from 'Core-Shell' structured hydrogel microfiber. To make 'Core-Shell' structure, collagen type I solution was introduced into core channel and 1.5% Na-alginate solution was injected into side channel in microfluidic chip. To evaluatethe 'Core-Shell' structure, the red and green fluorescence substances were mixed into collagen type I and Na-alginate solution, respectively. The fluorescence substances were uniformly loaded into each fiber, and the different fluorescence images were dependent on their location. By immoblizing EpH4-Ras and C6 cells within collagen type I and Na-alginate solution, we sucessfully demonstrated the co-culture of EpH4-Ras and C6 cells with 'Core-Shell' like hydrogel microfiber for 5 days. Only to produce pure collagen type I hydrogel fiber, tri-sodium citrate solution was used to dissolve the shell-like Ca-alginate hydrogel fiber from 'Core-Shell' structured hydrogel microfiber, which is an excellent advantage when the fiber is employed in three-dimensional scaffold. This novel method could apply various application in tissue engineering and biomedical engineering.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.8
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• pp.8-13
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• 2009

LED BLU(Back Light Unit), based on MCPCB(Metal Core Printed Circuit Board) with anodizing oxide dielectric layer and improved thermal dissipation property, are presented. Reflecting cups were also formed on the surface of the MCPCB such that optical coupling between neighboring chips were minimized for improving the photon extraction efficiency. LED chips were directly attached on the MCPCB by using the COB (Chip On Board) scheme.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.5
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• pp.283-288
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• 2000

In this work, small-size, high-performance simple solenoid-type RF chip inductors utilizing an Al2O3 core material were investigated. Copper (Cu) wire with $40\mum$ diameter was used as the coils and the size of the chip inductor fabricated in this work was $2.1mm\times1.5mm\times1.0mm$. The external current source was applied after bonding Cu coil leads to gold pads electro-plated on each end of backsides of a core material. High frequency characteristics of the inductance (L), quality factor (Q), and impedance (Z) of developed inductors were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). This HP4291B was also used to obtain the equivalent circuit and its circuit parameters of the chip inductors. This HP4291B was also used to obtain the equivalent circuit and its circuit parameters of the chip inductors. The developed inductors have the self-resonant frequency (SRF) of 1.1 to 3.1 GHz and exhibit L of 22 to 150 nH. The L of the inductors decreases with increasing the SRF. The Z of the inductors has the maximum value at the SRF and the inductors have the quality factor of 70 to 97 in the frequency range of 500 MHz to 1.5 GHz.