• 제목/요약/키워드: Convergence technique

검색결과 2,379건 처리시간 0.022초

철도 차량의 축에 대한 구조 해석을 통한 융합 기술연구 (Study on Convergence Technique through Structural Analysis on the Axle of Railway Vehicle)

  • 조재웅
    • 한국융합학회논문지
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    • 제6권1호
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    • pp.93-101
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    • 2015
  • 철도차량에서의 축은 안전한 운행을 하기 위해서는 중요한 역할을 함으로서 그 강도 및 내충격성, 재질, 안전계수, 응력 및 변형이 고려되어야 한다. 본 연구에서는 Model 1과 Model 2의 시뮬레이션 모델들이 있다. 이 모델들은 CATIA와 ANSYS로 설계, 구조 및 피로 해석을 통한 융합 기술을 수행함으로서 연구된다. Model A의 최대 변형량과 최대 등가응력이 Model B보다 더 작음으로서 Model A가 Model B보다 내구성을 더 가지고 있다. 본 연구 결과를 철도 차량의 부품 설계에 응용함으로서 파손을 방지하기 위한 내구성이 고찰될 수 있다. 그리고 디자인 면에서의 융합 기술로의 접목도 가능하여 미적인 감각을 나타낼 수 있다.

Efficient Maximum Power Tracking of Energy Harvesting Using a ${\mu}$Controller for Power Savings

  • Heo, Se-Wan;Yang, Yil-Suk;Lee, Jae-Woo;Lee, Sang-Kyun;Kim, Jong-Dae
    • ETRI Journal
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    • 제33권6호
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    • pp.973-976
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    • 2011
  • This letter describes an efficient technique for maximum power point tracking (MPPT) of an energy harvesting device. It is based on controlling the device voltage at the point of maximum power. Using a microcontroller with a power saving technique, the MPPT algorithm maintains the maximum power with low power consumption. An experiment shows that the algorithm maximizes the energy transfer power using an energy management IC fabricated in a 0.18-${\mu}m$ process. Compared to direct energy transfer to a battery, the proposed technique is more efficient for low-energy harvesting under variable conditions.

IMPROVEMENT OF CROSS-CORRELATION TECHNIQUE FOR LEAK DETECTION OF A BURIED PIPE IN A TONAL NOISY ENVIRONMENT

  • Yoon, Doo-Byung;Park, Jin-Ho;Shin, Sung-Hwan
    • Nuclear Engineering and Technology
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    • 제44권8호
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    • pp.977-984
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    • 2012
  • The cross-correlation technique has been widely used for leakage detection of buried pipes, and this technique can be successfully applied when the leakage signal has a high signal-to-noise ratio. In the case of a power plant, the measured leakage signals obtained from the sensors may contain background noise and mechanical noise generated by adjacent machinery. In such a case, the conventional method using the cross-correlation function may fail to estimate the leakage point. In order to enhance the leakage estimation capability of a buried pipe in a noisy environment, an improved cross-correlation technique is proposed. It uses a noise rejection technique in the frequency domain to effectively eliminate the tonal noise due to rotating machinery. Experiments were carried out to verify the validity of the proposed method. The results show that even in a tonal noisy environment, the proposed method can provide more reliable means for estimating the time delay of the leakage signals.

Hybrid SPR 접합을 적용한 이종소재 인장전단에 관한 연구 (Investigating the Tensile-Shear of Dissimilar Materials Joined Using the Hybrid SPR Technique)

  • 유관종;최두복;김재열
    • 한국기계가공학회지
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    • 제19권9호
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    • pp.33-39
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    • 2020
  • Self-piercing rivets are often used in the automotive industry, among other industries, as mechanical components to join multiple materials such as aluminum alloys. Self-piercing rivets have a strong sealing property, although there is considerable scope for their performance improvement. In this study, to enhance the performance of self-piercing rivets, the hybrid self-piercing riveting (SPR) technique, using the existing SPR and structural adhesive, was proposed. Moreover, heterogeneous material specimens subjected to the hybrid SPR technique were manufactured and tested. The joint strength of the test pieces of different materials was evaluated through finite element analyses.

Switched-Capacitor Variable Gain Amplifier with Operational Amplifier Preset Technique

  • Cho, Young-Kyun;Jeon, Young-Deuk;Kwon, Jong-Kee
    • ETRI Journal
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    • 제31권2호
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    • pp.234-236
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    • 2009
  • We present a novel operational amplifier preset technique for a switched-capacitor circuit to reduce the acquisition time by improving the slewing. The acquisition time of a variable gain amplifier (VGA) using the proposed technique is reduced by 30% compared with a conventional one; therefore, the power consumption of the VGA is decreased. For additional power reduction, a programmable capacitor array scheme is used in the VGA. In the 0.13 ${\mu}m$ CMOS process, the VGA, which consists of three-stages, occupies 0.33 $mm^2$ and dissipates 19.2 mW at 60 MHz with a supply voltage of 1.2 V. The gain range is 36.03 dB, which is controlled by a 10-bit control word with a gain error of ${\pm}0.68$ LSB.

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IoT기반 클라우드 융합환경에서 안전한 접근제어를 위한 인증서 관리기법 설계 (A Design of Certificate Management Method for Secure Access Control in IoT-based Cloud Convergence Environment)

  • 박중오
    • 융합정보논문지
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    • 제10권7호
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    • pp.7-13
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    • 2020
  • 4차 산업혁명의 핵심 IT기술인 사물인터넷은 타산업과 융합되어 사용자로부터 다양한 서비스를 제공하고 있다. IoT 융합기술은 사용자의 편의성 증대에 따른 통신환경에 대한 커뮤니케이션 패러다임을 이끌고 있다. 하지만 빠르게 발전하는 IoT 융합기술에 대한 보안 방안 마련이 시급하다. IoT는 디지털 윤리와 개인정보보호와 밀접한 관계를 가지고 있어, 타 산업에 IoT 도입에 따른 위협요소 대책안을 마련해야한다. 보안사고 발생 시 정보유출, 이미지 실추, 금적적인 손해, 인명피해 등 다양한 문제가 나타날 수 있다. 그러므로 본 논문에서는 IoT기반 클라우드 융합 환경에서 안전한 접근 제어를 위한 인증서 관리기법을 제안한다. 디바이스 및 사용자 등록, 메시지 통신 프로토콜, 디바이스 갱신 및 관리 기법을 설계하였다. 공격기법 및 취약점에 따른 안전성 분석을 수행하였으며, 기존 PKI 기반 인증서 관리기법 대비 효율성 평가결과 약 32%의 감소된 수치를 확인 할 수 있었다.

이중 변환 UPS의 병렬 운전 시 외란 저감 성능 향상을 위한 정지 좌표계 상의 전향 보상 기법 (Feed-Forward Compensation Technique in Stationary Reference Frame for the Enhanced Disturbance Rejection Performance in Parallel Operation of Double-Conversion UPSs)

  • 류효준;윤영두;모재성;최승철;우태겸
    • 전력전자학회논문지
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    • 제27권5호
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    • pp.367-375
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    • 2022
  • Generally, a proportional-resonant controller is used to eliminate steady-state errors during the voltage-current control of a double-conversion uninterruptible power supply (UPS) in a stationary reference frame. Additionally, the feed-forward control compensating for the load current, which can be considered a disturbance of the voltage controller, can be used to improve the disturbance rejection performance. However, during the parallel operation of UPSs, circulating current can occur between UPS modules when performing both feed-forward control and droop control because feed-forward control reduces the circulating current impedance. This study proposes a feed-forward compensation technique that considers the impedance of circulating current. An additional feed-forward compensation technique is developed to enhance the disturbance rejection performance. The validity of the proposed feed-forward compensation technique is verified by the experiment results of the parallel operation of a 500 W double-conversion UPS module.

테스트가 용이한 고속 풀 스윙 BiCMOS회로의 설계방식과 테스트 용이도 분석 (Disign Technique and Testability Analysis of High Speed Full-Swing BiCMOS Circuits)

  • 이재민;정광선
    • 한국산업융합학회 논문집
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    • 제4권2호
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    • pp.199-205
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    • 2001
  • With the growth of BiCMOS technology in ASIC design, the issue of analyzing fault characteristics and testing techniques for BiCMOS circuits become more important In this paper, we analyze the fault models and characteristics of high speed full-swing BiCMOS circuits and the DFT technique to enhance the testability of full-swing high speed BiCMOS circuits is discussed. The SPICE simulation is used to analyze faults characteristics and to confirm the validity of DFT technique.

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차량용 리프트의 형상에 따른 CAE를 통한 융합 기술 연구 (Convergence Technique Study through CAE due to the Shape of Lift for Car)

  • 이정호;조재웅
    • 한국융합학회논문지
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    • 제6권5호
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    • pp.49-54
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    • 2015
  • 오늘날 차량 정비에서의 기본적인 장비 중 하나인 리프트는 무거운 차량의 중량을 버틸 수 있어야 한다. 이에 따라 차량의 수리를 용이하게 해주는 튼튼한 리프트는 필수적인 장비이다. 본 연구에서는 세 가지 형상의 리프트들을 모델링하였으며, 이를 ANSYS 유한요소해석 프로그램으로 CAE를 수행하였다. 본 연구 결과값들을 바탕으로 각 형상에 따른 리프트들의 내구성을 예측할 수 있었고, 궁극적으로 안전하고 내구성이 있는 새로운 차량용리프트 개발에 기여하기 위한 데이터들을 축적할 수 있었다. 또한 디자인 면에서 융합 기술로의 접목도 가능하여 미적인 감각을 나타낼 수 있다.

A 1.2 V 12 b 60 MS/s CMOS Analog Front-End for Image Signal Processing Applications

  • Jeon, Young-Deuk;Cho, Young-Kyun;Nam, Jae-Won;Lee, Seung-Chul;Kwon, Jong-Kee
    • ETRI Journal
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    • 제31권6호
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    • pp.717-724
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    • 2009
  • This paper describes a 1.2 V 12 b 60 MS/s CMOS analog front-end (AFE) employing low-power and flexible design techniques for image signal processing. An op-amp preset technique and programmable capacitor array scheme are used in a variable gain amplifier to reduce the power consumption with a small area of the AFE. A pipelined analog-to-digital converter with variable resolution and a clock detector provide operation flexibility with regard to resolution and speed. The AFE is fabricated in a 0.13 ${\mu}m$ CMOS process and shows a gain error of 0.68 LSB with 0.0352 dB gain steps and a differential/integral nonlinearity of 0.64/1.58 LSB. The signal-to-noise ratio of the AFE is 59.7 dB at a 60 MHz sampling frequency. The AFE occupies 1.73 $mm^2$ and dissipates 64 mW from a 1.2 V supply. Also, the performance of the proposed AFE is demonstrated by an implementation of an image signal processing platform for digital camcorders.