• 전자공학회논문지CI
• /
• 제40권6호
• /
• pp.32-38
• /
• 2003

인간 친화적인 10진 계산을 위한 3초과 십진 가·감산기 회로를 제안한다. 십진 회로를 이용한 계산 시속도 문제는 carry lookahead (CLA) 회로를 이용하여 해결할 수 있다. 제안하는 3초과 십진수 가산기 설계에서는 CLA와 함께 보정회로 및 변환회로를 개선함으로서 지연시간을 줄일 수 있다. 3초과 코드를 사용함으로서 감산과정에서 가산기만을 사용하여 계산을 할 수 있다 이 3초과 십진 가ㆍ감산회로는 기존의 설계에 비하여 상당한 속도 개선효과를 얻게 해준다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1995년도 추계학술대회 논문집 학회본부
• /
• pp.189-191
• /
• 1995

This paper proposes a design of self-tuning fuzzy controller based on evolutionary computation. Optimal membership functions are found by using evolutionary computation. Genetic algorithms and evolution strategy are used for tuning of fuzzy membership function. An arbitrarily speed trajectory is selected to show the performance of the proposed methods. Experiment results show the good performance in the DC motor control system with the self-tuning fuzzy controller based on evolutionary computation.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1995년도 하계학술대회 논문집 B
• /
• pp.652-654
• /
• 1995

This paper proposes a design of self-tuning fuzzy controller based on evolutionary computation. Optimal membership functions are round by using evolutionary computation. Genetic algorithms and evolution strategy are used for tuning of fuzzy membership function. A arbitrarily speed trajectories is selected to show the performance of the proposed methods. Simulation results show the good performance in the DC motor control system with the self-tuning fuzzy controller based on evolutionary computation.

• 한국IT서비스학회지
• /
• 제7권4호
• /
• pp.221-230
• /
• 2008

Green's relations are five equivalence relations that characterize the elements of a semigroup in terms of the principal ideals. The J relation is one of Green's relations. Although there are known algorithms that can compute Green relations, they are not useful for finding all J relations in the semigroup of all $n{\times}n$ Boolean matrices. Its computation requires multiplication of three Boolean matrices for each of all possible triples of $n{\times}n$ Boolean matrices. The size of the semigroup of all $n{\times}n$ Boolean matrices grows exponentially as n increases. It is easy to see that it involves exponential time complexity. The computation of J relations over the $5{\times}5$ Boolean matrix is left an unsolved problem. The paper shows theorems that can reduce the computation time, discusses an algorithm for efficient J relation computation whose design reflects those theorems and gives its execution results.

• 한국경영과학회:학술대회논문집
• /
• 한국경영과학회/대한산업공학회 2003년도 춘계공동학술대회
• /
• pp.1077-1084
• /
• 2003

The performance of simulated annealing (SA) algorithm such as solution optimality and computation time mainly depends on how to determine the SA-related parameters Several schemes have been suggested to improve the performance of SA and several parameter design methods have been utilized to select parameter values of each scheme. In this paper, we propose a new SA algorithm design method that can determine schemes as well as parameter values simultaneously The new SA algorithm design method is based on the Taguchl method which primarily selects the design parameters for a product or process to minimize the effect of noise parameters. so that the response is close to the desired target with minimum variation. To show the effectiveness of the proposed method, extensive computation experiments are conducted.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2004년도 하계학술대회 논문집 B
• /
• pp.893-895
• /
• 2004

This paper deals with an automatic design standard computation based on a rated watt for a synchronous reluctance motor(SynRM). The focus of this paper is the design relative to the output power on the basis of rotor shape of a SynRM in each rated watt. The copuled Finite Elements Analysis(FEA) & Preisach model have been used to evaluate nonlinear solutions. The proposed procedure allows to define the rotor gemetric dimensions according to the rotor dia and rated watt starting from an existing motor or a preliminary design.

• 대한전기학회논문지:시스템및제어부문D
• /
• 제53권2호
• /
• pp.86-93
• /
• 2004

The DCT algorithm needs an efficient hardware architecture to compute inner product. The conventional design method, like ROM-based DA(Distributed Arithmetic), has large hardware complexity. Because of this reason, a CSHM(Computation Sharing Multiplication) was proposed for implementing inner product by Park. However, the Park's CSHM has inefficient hardware architecture in the precomputer and select units. Therefore it degrades the performance of the multiplier. In this paper, we presents the optimization design method for inner product using CSHM algorithm and applied it to implementation of 1-D DCT processor. The experimental results show that the proposed multiplier is more efficient than Park's when hardware architectures and logic synthesis results were compared. The designed 1-D DCT processor by using proposed design method is more high performance than typical methods.

• Journal of information and communication convergence engineering
• /
• 제11권1호
• /
• pp.50-55
• /
• 2013

In this paper, we propose a parallel intra-operation unit and a memory architecture for improving the performance of intra-prediction, which utilizes spatial correlation in an image to predict the blocks and contains 17 prediction modes in total. The design is targeted for portable devices applying H.264/AVC decoders. For boosting the performance of the proposed design, we adopt a parallel intra-operation unit that can achieve the prediction of 16 neighboring pixels at the same time. In the best case, it can achieve the computation of one luma $16{\times}16$ block within 16 cycles. For one luma $4{\times}4$ block, a mere one cycle is needed to finish the process of computation. Compared with the previous designs, the average cycle reduction rate is 78.01%, and the gate count is slightly reduced. The design is synthesized with the MagnaChip $0.18{mu}m$ library and can run at 125 MHz.

• 한국실내디자인학회논문집
• /
• 제15권1호
• /
• pp.30-38
• /
• 2006

The new aspect of contemporary architectural design is the computer simulation of morphogenesis and evolution of the organic body. Morphogenesis and evolution is the kind of emergence that is the process of complex pattern formation from simpler rules in complex system. The development comprises the sequence of pattern formation, differentiation, morphogenesis, growth. This study analyzes the application methodology of various biomorphism in contemporary architecture. The methods of generative application by computation in architecture are self-organization, differentiation, growth algorithm via MoSS. And the methods of evolution by computation are genetic algorithm, multi-parameter in environments, phylogenetic cross-over, competing as natural selection, mutation+external constraints, generative algorithm+genetic algorithm via Genr8.

• 한국지능시스템학회논문지
• /
• 제8권6호
• /
• pp.37-47
• /
• 1998

본 논문은 진화 연산 알고리즘과 퍼지 로직을 이용하여 고속 열처리 공정기의 웨이퍼 온도를 제어하는 제어기 설계 방법을 제안한다. 전체 제어기는 기준 온도의 정상 상태의 추종을 위한 앞먹임 정적 제어기, 과도 상태의 추종을 위한 앞먹임 동적 제어기, 그리고 온라인 상에서 모델링 오차나 외란을 극복하기 위한 되먹임 오차 제어기로 구성된다. 앞먹임 제어기들은 퍼지 로직을 이용하여 모든 동작점에서 제어 입력을 구해주는 전역적 비선형 제어기로 구성된다. 각 제어기들의 제어 파라미터는 진화 연산 알고리즘을 이용하여 추정되므로 수학적 모델식을 모르는 경우에도 제어기를 설계할 수 있는 장점이 있다. 끝으로 모의 실험을 통하여 제어기의 성능을 검증한다.