• Journal of the Korea Society of Computer and Information
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• v.20 no.2
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• pp.63-70
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• 2015

In the absence of a polynomial time algorithm capable of obtaining the exact solutions to it, the domatic number problem (DNP) of dominating set (DS) has been regarded as NP-complete. This paper suggests polynomial-time complexity algorithm about DNP. In this paper, I select a vertex $v_i$ of the maximum degree ${\Delta}(G)$ as an element of a dominating set $D_i,i=1,2,{\cdots},k$, compute $D_{i+1}$ from a simplified graph of $V_{i+1}=V_i{\backslash}D_i$, and verify that $D_i$ is indeed a dominating set through $V{\backslash}D_i=N_G(D_i)$. When applied to 15 various graphs, the proposed algorithm has succeeded in bringing about exact solutions with polynomial-time complexity O(kn). Therefore, the proposed domatic number algorithm shows that the domatic number problem is in fact a P-problem.

• Journal of Navigation and Port Research
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• v.29 no.5 s.101
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• pp.447-455
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• 2005

Intra-block remarshalling is the task of rearranging into some target bays those containers which are scattered within around the block. If multiple transfer cranes installed in the block are all used together we may be able to complete the remarshalling task as early as possible. However, when multiple cranes are used simultaneously, there may occur significant delays if we do not carefully consider interferences between the cranes at the time of scheduling. Especially, delays caused by interferences occur more frequently in case of using non-crossing cranes. This paper presents an efficient heuristic method for assigning moves of containers to each crane and for determining an appropriate container moving order in a manner sensitive to the interferences. Simulation experiments have shown that the proposed method can effectively reduce delays in various environments.

• The Transactions of the Korea Information Processing Society
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• v.6 no.3
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• pp.589-602
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• 1999

There are some advantages of developing applications based on the object oriented concepts. One os them is that it is possible to reuse the existing designs and products. This paper provides a formal method for the reorganization of class hierarchies for the object extension in the object oriented design phase. In this paper, we introduce classes, and edges to represent the inheritance and aggregation relationship between classes. Based on the graph, we define an order relation(called the object extension) between class hierarchy graphs. And also we present a set of five basic transformations preserving the object extension relation. The set is proven to be correct and complete. The results of this paper help form a theoretical basis for the extension and reorganization object-oriented application systems.

• The Transactions of the Korea Information Processing Society
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• v.5 no.8
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• pp.1997-2012
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• 1998

It is necessary to find out the parallelism in tlle sequential Java program to execute it on the parallel machine. The loop is a fundamental source to exploit parallelism as it process a large portion of total execution time in sequential Java program on the parallel machine. However, a complete parallel execution can hardly be achieved due to data dependence. This paper proposes the method of exploiting the implicit parallelism by structuring a dependence graph through the analysis of data dependence in the existing Java programming language having a nested loop structure. The parallel code generation method through the restructuring compiler and also the translation method of Java source program into multithread statement. which is supported by the Java programming language itself, are proposed here. The perforance evaluatlun of the program translaed into the thread statement is conducted using the trip cunt of loop and the trip Count of luop and the thread count as parameters The resttucturing compiler provides efficient way of exploiting parallelism by reducing manual overhead conveliing sequential Java program into parallel code. The execution time for the Java program as a result can be reduced un the parallel machine.

• Korean Journal of Chemical Engineering
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• v.35 no.12
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• pp.2327-2335
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• 2018

Fluid catalytic cracking (FCC) is an important chemical process that is widely used to produce valuable petrochemical products by cracking heavier components. However, many difficulties exist in modeling the FCC process due to its complexity. In this study, a dynamic process model of a FCC process is suggested and its structural observability is analyzed. In the process modeling, yield function for the kinetic model of the riser reactor was applied to explain the product distribution. Hydrodynamics, mass balance and energy balance equations of the riser reactor and the regenerator were used to complete the modeling. The process model was tested in steady-state simulation and dynamic simulation, which gives dynamic responses to the change of process variables. The result was compared with the measured data from operating plaint. In the structural analysis, the system was analyzed using the process model and the process design to identify the structural observability of the system. The reactor and regenerator unit in the system were divided into six nodes based on their functions and modeling relationship equations were built based on nodes and edges of the directed graph of the system. Output-set assignment algorithm was demonstrated on the occurrence matrix to find observable nodes and variables. Optimal locations for minimal addition of measurements could be found by completing the whole output-set assignment algorithm of the system. The result of this study can help predict the state more accurately and improve observability of a complex chemical process with minimal cost.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.19 no.3
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• pp.193-199
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• 2019

In this paper I propose an algorithm of linear time complexity for NP-complete Maximum Independent Set (MIS) problem. Based on the basic property of the MIS, which forbids mutually adjoining vertices, the proposed algorithm derives the solution by repeatedly selecting vertices in the ascending order of their degree, given that the degree remains constant when vertices ${\nu}$ of the minimum degree ${\delta}(G)$ are selected and incidental edges deleted in a graph of n vertices. When applied to 22 graphs, the proposed algorithm could obtain the MIS visually yet effortlessly. The proposed linear MIS algorithm of time complexity O(n) always executes ${\alpha}(G)$ times, the cardinality of the MIS, and thus could be applied as a general algorithm to the MIS problem.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.24 no.3
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• pp.95-101
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• 2024

The numberlink puzzle(NLP), which non-crossings with other numbers of connection in connecting lines through empty cells between a given pair of numbers, is an NP-complete problem with no known way to solve the puzzle in polynomial time. Until now, arbitrary numbers have been selected and puzzles have been solved using trial-and-error methods. This paper converts empty cells into vertices in lattice graphs connected by edge between adjacent cells for a given problem. Next, a straight line was drawn between the pairs of numbers and divided into groups of numbers where crossing occurred. A bypass route was established to avoid intersection in the cross-number group. Applying the proposed algorithm to 18 benchmarking data showed that the puzzle could be solved with a linear time complexity of O(n) for all data.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.10
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• pp.17-28
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• 1999

In this paper, an ASIC emulation system called ACE (ASIC Emulator) is proposed. It can produce the prototype of target ASIC in a short time and verify the function of ASIC circuit immediately The ACE is consist of emulation software in which there are EDIF reader, library translator, technology mapper, circuit partitioner and LDF generator and emulation hardware including emulation board and logic analyzer. Technology mapping is consist of three steps such as circuit partitioning and extraction of logic function, minimization of logic function and grouping of logic function. During those procedures, the number of basic logic blocks and maximum levels are minimized by making the output to be assigned in a same block sharing product-terms and input variables as much as possible. Circuit partitioner obtain chip-level netlists satisfying some constraints on routing structure of emulation board as well as the architecture of FPGA chip. A new partitioning algorithm whose objective function is the minimization of the number of interconnections among FPGA chips and among group of FPGA chips is proposed. The routing structure of emulation board take the advantage of complete graph and partial crossbar structure in order to minimize the interconnection delay between FPGA chips regardless of circuit size. logic analyzer display the waveform of probing signal on PC monitor that is designated by user. In order to evaluate the performance of the proposed emulation system, video Quad-splitter, one of the commercial ASIC, is implemented on the emulation board. Experimental results show that it is operated in the real time of 14.3MHz and functioned perfectly.

• 한국정보교육학회:학술대회논문집
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• 2011.01a
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• pp.91-101
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• 2011

The purpose of this paper is to quickly identify school parents, teachers, students, community needs and opinions for curriculum organizing and the implementation of an online survey system for operating educational activities. Online survey system should be implemented based on Limesurvey to reduce costs and administrative costs. Limesurvery is available without the development of the separate program and offers the form of web-based template system, complete design, layout. Also, Limesurvey offers basic statistical analysis of survey data. Limesurvey can be executed by installing the program on a web hosting, typing database information. Limesurvey can be made a graph of the statistical results. Besides, Limesurvery can be stored in the form of HTML, Word, Excel, CSV Files and can be stured as basic datas for SPSS or PASW, R data, other statistical processing programs. If we could be operate Limesurvey in the form of open source-based survey program in elementary school, we could be reduced teacher's unnecessary work for statistics and overcame the problem of offline survey system.

• Communications of Mathematical Education
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• v.26 no.2
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• pp.177-203
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• 2012

The purpose of this research was to look at whether small group drawing activities can be applied to learning content that combine mathematics and art, by analyzing the changes in $10^{th}$ grade students' interests in mathematics and particular features of their strategic thinking that were reflected in small group drawing activities using graphs and inequations. The results of the study are as follows: 1. The small group drawing activity using graphs and inequations demonstrated that students interests in mathematics could experience positive changes. 2. The small group drawing activity using graphs and inequations was effective in stimulating the students' strategic thinking skills, which are higher level thinking activities necessary for creating problem solving. As the students went through the whole process of accomplishing a complete goal, the students engaged in integrated thinking activities that brought understandings of basic graphs and inequations together, and were also found to use such higher level thinking functions needed in achieving creative problem solving such as critical thinking, flexible thinking, development-oriented thinking, and inferential thinking. 3. The small group drawing activity using graphs and in equations could be expected to constitute learning content that integrate mathematics and art, and is an effective solution in boosting students' strengths in mathematics by way of activities that consider students' unique cognitive and qualitative peculiarities and through integration with art.