• 제목/요약/키워드: Complementary switching

검색결과 53건 처리시간 0.03초

High-Isolation SPDT RF Switch Using Inductive Switching and Leakage Signal Cancellation

  • Ha, Byeong Wan;Cho, Choon Sik
    • Journal of electromagnetic engineering and science
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    • 제14권4호
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    • pp.411-414
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    • 2014
  • A switch is one of the most useful circuits for controlling the path of signal transmission. It can be added to digital circuits to create a kind of gate-level device and it can also save information into memory. In RF subsystems, a switch is used in a different way than its general role in digital circuits. The most important characteristic to consider when designing an RF switch is keeping the isolation as high as possible while also keeping insertion loss as low as possible. For high isolation, we propose leakage signal cancellation and inductive switching for designing a singlepole double-throw (SPDT) RF switch. By using the proposed method, an isolation level of more than 23 dB can be achieved. Furthermore, the heterojunction bipolar transistor (HBT) process is used in the RF switch design to keep the insertion loss low. It is demonstrated that the proposed RF switch has an insertion loss of less than 2 dB. The RF switch operates from 1 to 8 GHz based on the $0.18-{\mu}m$ SiGe HBT process, taking up an area of $0.3mm^2$.

Two Phase Clocked Adiabatic Static CMOS Logic and its Logic Family

  • Anuar, Nazrul;Takahashi, Yasuhiro;Sekine, Toshikazu
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제10권1호
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    • pp.1-10
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    • 2010
  • This paper proposes a two-phase clocked adiabatic static CMOS logic (2PASCL) circuit that utilizes the principles of adiabatic switching and energy recovery. The low-power 2PASCL circuit uses two complementary split-level sinusoidal power supply clocks whose height is equal to $V_{dd}$. It can be directly derived from static CMOS circuits. By removing the diode from the charging path, higher output amplitude is achieved and the power consumption of the diode is eliminated. 2PASCL has switching activity that is lower than dynamic logic. We also design and simulate NOT, NAND, NOR, and XOR logic gates on the basis of the 2PASCL topology. From the simulation results, we find that 2PASCL 4-inverter chain logic can save up to 79% of dissipated energy as compared to that with a static CMOS logic at transition frequencies of 1 to 100 MHz. The results indicate that 2PASCL technology can be advantageously applied to low power digital devices operated at low frequencies, such as radio-frequency identifications (RFIDs), smart cards, and sensors.

Volatile Memristor-Based Artificial Spiking Neurons for Bioinspired Computing

  • Yoon, Soon Joo;Lee, Yoon Kyeung
    • 한국전기전자재료학회논문지
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    • 제35권4호
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    • pp.311-321
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    • 2022
  • The report reviews recent research efforts in demonstrating a computing system whose operation principle mimics the dynamics of biological neurons. The temporal variation of the membrane potential of neurons is one of the key features that contribute to the information processing in the brain. We first summarize the neuron models that explain the experimentally observed change in the membrane potential. The function of ion channels is briefly introduced to understand such change from the molecular viewpoint. Dedicated circuits that can simulate the neuronal dynamics have been developed to reproduce the charging and discharging dynamics of neurons depending on the input ionic current from presynaptic neurons. Key elements include volatile memristors that can undergo volatile resistance switching depending on the voltage bias. This behavior called the threshold switching has been utilized to reproduce the spikes observed in the biological neurons. Various types of threshold switch have been applied in a different configuration in the hardware demonstration of neurons. Recent studies revealed that the memristor-based circuits could provide energy and space efficient options for the demonstration of neurons using the innate physical properties of materials compared to the options demonstrated with the conventional complementary metal-oxide-semiconductors (CMOS).

액티브 클램프 포워드 컨버터의 출력 리플 저감에 관한 연구 (A Study on the output ripple reduction of Active-Clamp Forward Converter)

  • 정재엽;김용;배진용;권순도;최근수
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2009년도 제40회 하계학술대회
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    • pp.963_964
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    • 2009
  • This paper presents an output ripple reduction of Active-Clamp Forward Converter, which is mainly composed of interleaving two active-clamping forward converters. By interleaving, Output ripple is reduced. The leakage inductance of the transformer or an additional resonant inductance is employed to achieve ZVS during the dead times. The duty cycles are not limited to be equal and within 50%. The complementary switching and the resulted interleaved output inductor currents diminish the current ripple in output capacitors. Accordingly, the smaller output chokes and capacitors lower the converter volume and increase the power density. Detailed analysis of this ouput reduction of Active-Clamp Forward Converter is described.

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Ferroelectric P(VDF/TrFE) Copolymers in Low-Cost Non-Volatile Data Storage Applications

  • Prabu A. Anand;Lee, Jong-Soon;Chang You-Min;Kim, Kap-Jin
    • 한국고분자학회:학술대회논문집
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    • 한국고분자학회 2006년도 IUPAC International Symposium on Advanced Polymers for Emerging Technologies
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    • pp.237-237
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    • 2006
  • P(VDF/TrFE(72/28) ultrathin films were used in the fabrication of Metal-Ferroelectric polymer-Metal (MFM) single bit device with special emphasis on uniform film surface, faster dipole switching time under applied external field and longer memory retention time. AFM and FTIR-GIRAS were complementary in analyzing surface crystalline morphology and the resultant change in chain orientation with varying thermal history. DC-EFM technique was used to 'write-read-erase' the data on the memory bit in a much faster time than P-E studies. The results obtained from this study will enable us to have a good understanding of the ferroelectric and piezoelectric behavior of P(VDF/TrFE)(72/28) thin films suitable for high density data storage applications.

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Integrated-Optic Electric-Field Sensor Utilizing a Ti:LiNbO3 Y-fed Balanced-Bridge Mach-Zehnder Interferometric Modulator With a Segmented Dipole Antenna

  • Jung, Hongsik
    • Journal of the Optical Society of Korea
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    • 제18권6호
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    • pp.739-745
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    • 2014
  • We have demonstrated a $Ti:LiNbO_3$ electro-optic electric-field sensor utilizing a $1{\times}2$ Y-fed balanced-bridge Mach-Zehnder interferometric (YBB-MZI) modulator, which uses a 3-dB directional coupler at the output and has two complementary output waveguides. A dc switching voltage of ~25 V and an extinction ratio of ~12.5 dB are observed at a wavelength of $1.3{\mu}m$. For a 20 dBm rf input power, the minimum detectable electric fields are ~8.21, 7.24, and ~13.3 V/m, corresponding to dynamic ranges of ~10, ~12, and ~7 dB at frequencies of 10, 30, and 50 MHz respectively. The sensors exhibit almost linear response for an applied electric-field intensity from 0.29 V/m to 29.8 V/m.

Touch Screen Sensing Circuit with Rotating Auto-Zeroing Offset Cancellation

  • Won, Dong-Min;Kim, HyungWon
    • Journal of information and communication convergence engineering
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    • 제13권3호
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    • pp.189-196
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    • 2015
  • In this paper, we present a rotating auto-zeroing offset cancellation technique, which can improve the performance of touch screen sensing circuits. Our target touch screen detection method employs multiple continuous sine waves to achieve a high speed for large touch screens. While conventional auto-zeroing schemes cannot handle such continuous signals properly, the proposed scheme does not suffer from switching noise and provides effective offset cancellation for continuous signals. Experimental results show that the proposed technique improves the signal-to-noise ratio by 14 dB compared to a conventional offset cancellation scheme. For the realistic simulation results, we used Cadence SPECTRE with an accurate TSP model and noise source. We also applied an asymmetric device size (10% MOS size mismatch) to the OP Amp design in order to measure the effectiveness of offset cancellation. We implemented the proposed circuit as part of a touch screen controller system-on-chip by using a Magnachip/SK Hynix 0.18-µm complementary metal-oxide semiconductor (CMOS) process.

Heterodyne Optical Interferometer using Dual Mode Phase Measurement

  • Yim, Noh-Bin
    • International Journal of Precision Engineering and Manufacturing
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    • 제2권4호
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    • pp.81-88
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    • 2001
  • We present a new digital phase measuring method for heterodyne optical interferometry, which providers high measuring speed up to 6 m/s with a fine displacement resolution of 0.1 nanometer. The key idea is combining two distinctive digital phase measuring techniques with mutually complementary characteristics to earth other one is counting the Doppler shift frequency counting with 20 MHz beat frequency for high-velocity measurement and the other is the synchronous phase demodulation with 2.0 kHz beat frequency for extremely fine displacement resolution. The two techniques are operated in switching mode in accordance wish the object speed in a synchronized way. Experimental results prove that the proposed dual mode phase measuring scheme is realized with a set of relatively simple electronic circuits of beat frequency shifting, heterodyne phase detection. and low-pass filtering.

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Calculation of Losses in VSC-HVDC based on MMC Topology

  • Kim, Chan-ki;Lee, Seong-doo
    • KEPCO Journal on Electric Power and Energy
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    • 제4권2호
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    • pp.47-53
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    • 2018
  • VSC technology is now well established in HVDC and is, in many respects, complementary to the older Line Commutated Converter (LCC) technology. Despite the various advantages of VSC technology, VSC HVDC stations have higher power losses than LCC stations. Although the relative advantages and disadvantages are well known within the industry, there have been very few attempts to quantify these factors on an objective basis. This paper describes methods to determine the operating losses of every component in the valve of VSC-HVDC system. The losses of the valve, including both conduction losses and switching losses, are treated in detail.

이온성 첨가제 도입을 통한 고이동도 고분자 반도체 특성 구현과 유기전계효과트랜지스터 및 유연전자회로 응용 연구 (High-Mobility Ambipolar Polymer Semiconductors by Incorporation of Ionic Additives for Organic Field-Effect Transistors and Printed Electronic Circuits)

  • 이동현;문지훈;박준구;정지윤;조일영;김동은;백강준
    • 한국전기전자재료학회논문지
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    • 제31권3호
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    • pp.129-134
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    • 2018
  • Herein, we report the manufacture of high-performance, ambipolar organic field-effect transistors (OFETs) and complementary-like electronic circuitry based on a blended, polymeric, semiconducting film. Relatively high and well-balanced electron and hole mobilities were achieved by incorporating a small amount of ionic additives. The equivalent P-channel and N-channel properties of the ambipolar OFETs enabled the manufacture of complementary-like inverter circuits with a near-ideal switching point, high gain, and good noise margins, via a simple blanket spin-coating process with no additional patterning of each active P-type and N-type semiconductor layer.