• Title/Summary/Keyword: Complementary switching

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Bidirectional Soft Switching Three-Phase Interleaved DC-DC Converter for a Wide Input Voltage Range (넓은 범위 입력전압에 소프트 스위칭이 가능한 양방향 인터리브드 DC-DC 컨버터)

  • Choi, Woo-Jin;Lee, Kyo-Beum;Joung, Gyu-Bum
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.4
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    • pp.313-320
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    • 2015
  • This study deals with a bidirectional interleaved soft switching DC-DC converter for a wide range of input voltages. The proposed converter operates in complementary switching with the purpose of inductor size reduction and zero-voltage switching (ZVS) operation. The current ripple related to complementary switching is minimized by three-phase interleaved operation. The main characteristics of the proposed topology are its soft-switching method of operation and its simple structure. The soft-switching operation and the system efficiency of the proposed converter are verified by experimental results.

A Study on Composition of A Novel Single Phase 3 Level Inverter Circuit (새로운 단상 3전위 인버터회로의 구성에 관한 연구)

  • 이종수;백종현
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.9 no.5
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    • pp.51-56
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    • 1995
  • The transistors of single phase 3 level PWM Inverter compose output power transistors and neutral point clamping transistors, which are NPN transistors. Waveforms of driving signals for this are PWM waves for power transistors and period operating waves for neutral point clamping transistors, which signals made W-type modulation from rectangular and sine wave. The output power transistors operate at ON-time complementary and neutral point clamping transistors operate at OFF-time complementary respectively. Therefore, each transistors operate in half period at parallel. Characteristics of this inverter circuit is parallel switching method about series switching method of general inverter. As modulation of 3 level drive signals made from full-wave rectifier of sine wave and rectangular wave, which are level wave about 3 level of complementary transistor inverter. So, this circuit composed complementary operation inverter of NPN transistors only compare with PNP-NPN complementary inverter, which have high power 3 level inverter of complementary operation.

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An Inductive-coupling Link with a Complementary Switching Transmitter and an Integrating Receiver

  • Jeong, Youngkyun;Kim, Hyun-Ki;Kim, Sang-Hoon;Kwon, Kee-Won;Chun, Jung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.2
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    • pp.227-234
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    • 2014
  • A transceiver for a high-speed inductive-coupling link is proposed. The bi-phase modulation (BPM) signaling scheme is used due to its good noise immunity. The transmitter utilizes a complementary switching method to remove glitches in transmitted data. To increase the timing margin on the receiver side, an integrating receiver with a pre-charging equalizer is employed. The proposed transceiver was implemented via a 130-nm CMOS process. The measured timing window for a $10^{-12}$ bit error rate (BER) at 1.8 Gb/s was 0.33 UI.

Modified adaptive complementary sliding mode control for the longitudinal motion stabilization of the fully-submerged hydrofoil craft

  • Liu, Sheng;Niu, Hongmin;Zhang, Lanyong;Xu, Changkui
    • International Journal of Naval Architecture and Ocean Engineering
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    • v.11 no.1
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    • pp.584-596
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    • 2019
  • This paper presents a Modified Adaptive Complementary Sliding Mode Control (MACSMC) system for the longitudinal motion control of the Fully-Submerged Hydrofoil Craft (FSHC) in the presence of time varying disturbance and uncertain perturbations. The nonlinear disturbance observer is designed with less conservatism that only boundedness of the derivative of the disturbance is required. Then, a complementary sliding mode control system combined with adaptive law is designed to reduce the bound of stabilization error with fast convergence. In particularly, the modified complementary sliding mode surface which contains the estimation of the disturbance can reduce the switching gain and retain the normal performance of the system. Moreover, a hyperbolic tangent function contained in the control law is utilized to attenuate the chattering of the actuator. The global asymptotic stability of the closed-loop system is demonstrated utilizing the Lyapunov stability theory. Ultimately, the simulation results show the effectiveness of the proposed approach.

Extension of the Dynamic Range using the Switching Operation of In-Pixel Inverter in Complementary Metal Oxide Semiconductor Image Sensors

  • Seong, Donghyun;Choi, Byoung-Soo;Kim, Sang-Hwan;Lee, Jimin;Lee, Jewon;Lee, Junwoo;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
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    • v.28 no.2
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    • pp.71-75
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    • 2019
  • This paper proposes the extension of the dynamic range in complementary metal oxide semiconductor (CMOS) image sensors (CIS) using switching operation of in-pixel inverter. A CMOS inverter is integrated in each unit pixel of the proposed CIS for switching operations. The n+/p-substrate photodiode junction capacitances are added to each unit pixel. When the output voltage of the photodiode is less than half of the power supply voltage of the CMOS inverter, the output voltage of the CMOS inverter changes from 0 V to the power supply voltage. Hence, the output voltage of the CMOS inverter is adjusted by changing the supply voltage of the CMOS inverter. Thus, the switching point is adjusted according to light intensity when the supply voltage of the CMOS inverter changes. Switching operations are then performed because the CMOS inverter is integrated with in each unit pixel. The proposed CIS is composed of a pixel array, multiplexers, shift registers, and biasing circuits. The size of the proposed pixel is $10{\mu}m{\times}10{\mu}m$. The number of pixels is $150(H){\times}220(V)$. The proposed CIS was fabricated using a $0.18{\mu}m$ 1-poly 6-metal CMOS standard process and its characteristics were experimentally analyzed.

A Study on The Multi-PWM Inverter by Complementary Transistor (상보형(相補形) 트랜지스터에 의한 다중(多重) PWM 인버터에 관한 연구)

  • Chung, Yon-Tack;Lee, Jong-Soo;Bee, Sang-Jun;Back, Jong-Hyun
    • Proceedings of the KIEE Conference
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    • 1989.07a
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    • pp.515-517
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    • 1989
  • This PWM inverter are used bridge circuit of two pair complementary transistor at each phase. The operation signals are 3 level PWM wave of W type and M type modulation, Which were obtained from switching time data by switching position calculation of triangular and sine wave. The output voltage waveforms of this inverter have the 5 level phase voltage and the 9 level line voltage of PWM.

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A Multi-Stair Case Wave PWM Inverter by Complementary Transistor (상보형 트랜지스테에 희한 다단 계단파 PWN 인버터)

  • 정연택;이종수;이달해;배상준;백종현;배영호
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.39 no.2
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    • pp.157-163
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    • 1990
  • The PWM inverter investigated in this paper utilizes a bridge type current sharing reactor circuit with tow pairs of complementary transistor at each phase. The driving signals for this inverter are 3 level PWM waves of W type an M type modulation, which are obtained from a microprocessor based on the switching time data obtained by switching position calculation of triangular and sine modulation wave. The output voltage waveforms of this inverter have 5 level phase voltage and 9 level line voltage of PWM. The harmonics of the output voltage are reduced to half when it is compared with single CTI, and the occurrence of harmonics is also reduced.

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High Speed Inductive Link Using Complementary Switching Transmitter and Integrating Receiver (상보적으로 스위칭하는 송신기와 적분형 수신기를 이용한 고속 인덕티브 링크)

  • Kim, Hyun-Ki;Roh, Joon-Wan;Chun, Young-Hyun;Kwon, Kee-Won;Chun, Jung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.12
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    • pp.37-44
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    • 2011
  • This paper presents the method of improving the data rate and BER in the inductive coupling link using a BPM signaling method. A complementary switching transmitter is used to remove invalid glitches at transmitted data, and the concept of pre-distortion is introduced to optimize received data. Also, an integrating receiver is used to increase the sampling margin and equalizing transistors are added in the pre-charge path of the integrator and comparator for high frequency operation. The transceiver designed with a 0.13 um CMOS technology operates at 2.4 Gb/s and consumes 5.99 mW from 1.2 V power supply.

Characterization of $V_2O_5$ thin films as a counter electrode for complementary electrochromic devices (상보형 전기변색소자용 $V_2O_5$박막의 대향전극 특성)

  • 조봉희;김영호
    • Electrical & Electronic Materials
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    • v.9 no.7
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    • pp.690-695
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    • 1996
  • We have systematically investigated the characterization of V$_{2}$O$_{5}$ thin films as a counter electrode for lithium based complementary electrochromic devices. The V$_{2}$O$_{5}$ thin films were prepared by thermal vacuum evaporation with varing the substrate temperature and film thickness. In electrochromic devices for smart windows, the WO$_{3}$ thin films with 400-800 nm thickness require to be capable of reversibly injection 10-15 mC/cm$^{2}$ of lithium, which is readily accomplished charge-balanced switching in a V$_{2}$O$_{5}$ thin films with 100-150nm thick. The V$_{2}$O$_{5}$ thin films produces considerably small changes in optical modulation properties in the visible and near infrared region(500-1100 nm) compared to the amorphous WO$_{3}$ thin films on 10-15 mC/cm$^{2}$ of lithium injection and the V$_{2}$O$_{5}$ thin films can therefore act as a counter electrode to WO$_{3}$ in a lithium based complementary clectrochromic devices. After 10$^{5}$ coloration/bleaching switching time, the degradation does not occurs and the devices exhibit a stable optical modulation in V$_{2}$O$_{5}$ thin films. It has shown that the injected lithium ion amounts in crystalline V$_{2}$O$_{5}$ thin films with the same thickness is large by 3-5 mC/cm$^{2}$ of lithium compared to the amorphous thin films in the same driving conditions. Therefore, to optimize the device performance, it is necessary to choose an appropriate film thickness and crystallinity of V$_{2}$O$_{5}$ for amorphous WO$_{3}$ film thickness as a working electrode.

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Modeling and Analysis of Zero Voltage Switching PWM Half Bridge DC/DC Converter (영전압 스위칭 PWM 하프 브릿지 컨버터의 모델링 및 분석)

  • 강정일;정영석;노정욱;윤명중
    • Proceedings of the KIPE Conference
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    • 1997.07a
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    • pp.101-110
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    • 1997
  • The circuit effects due to the transformer primary side series equivalent inductance in the Zero Voltage Switching Pulse Width Modulated Half Bridge DC/DC Converter and its impact on the effective duty are analyzed. The steady state equations and the small signal model of the converter are derived incorporating the effects of the complementary control and the utilization of transformer primary side series equivalent inductance. The open plant dynamics are analyzed on the basis of the model derived. The model predictions are confirmed by experimental measurements.

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