• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.8
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• pp.1-7
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• 1998

This paper reports a dispersion compensation technique to implement tje distortionless transmission line by satisfying the heaviside conditon. Because of the skin depth for aconductor, compensation condition is dependent on the freuqncy variation. For this reason, first, the resistance have been chaacterized in awide range of frequencies, and then found the effective conductivity of the substrate which satisfied the heaviside condition. The phase velocity and the characteristics impedance are prresented nearly constant over a wideband frequency range.

• Proceedings of the KSR Conference
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• 2004.06a
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• pp.1233-1239
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• 2004

This study analysis the current level of the Korea High Speed Line by mathematical model of the rail and compensation capacitors. The rail and compensation capacitors are represented by transmission parameters and the analysis is processed by computer simulation.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1838-1840
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• 2001

A dual probe laser Doppler vibrometer (LDV) that has one laser source and provides two independent object beams has been developed for the first time. An electronic circuit that converts light signal to electronic signal has been also developed using digital phase locked loop(DPLL). It was found that this types of dual probe LDV can be used in differential mode and self-vibration compensation mode.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.8
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• pp.522-528
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• 2000

In this paper, a static synchronous compensator(STATCOM), which in general compensates reactive power, is proposed in order to balance the unbalanced loads. Reference values for the compensation of the unbalanced loads currents are determined by 3-phase circuit analysis result. Also the STATCOM control unit is designed considering the proposed compensation scheme for the unbalanced loads. As a result, the effectiveness of the STATCOM for balancing the load currents is verified by computer simulations.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.224-225
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• 2012

When Power Factor Correction(PFC) boost converter is designed for the universal input range, unwanted burst operation can be found at high line and light load. This operation may cause an audible noise from the boost inductor or sensitive flicker for human eye can be found in case of the display application. In order to solve this difficulty, this paper proposes the new control range compensation method and shows the effectiveness than the conventional method thru the experimental result.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.3
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• pp.207-214
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• 2016

Optical communication systems are rapidly spread following increases in data traffic. In this work, a 32-Gb/s inductorless output buffer circuit with adjustable pre-emphasis is proposed. The proposed circuit consists of an output buffer circuit and an emphasis circuit. The emphasis circuit emphasizes the high frequency components and adds the characteristics of the output buffer circuit. We proposed a design method using a small-signal equivalent-circuit model and designed the compensation characteristics with a 65-nm CMOS process in detail using HSPICE simulation. We also realized adjustable emphasis characteristics by controlling the voltage. To confirm the advantages of the proposed circuit and the design method, we fabricated an output buffer IC with adjustable pre-emphasis. We measured the jitter and eye height with a 32-Gb/s input using the IC. Measurement results of double-emphasis showed that the jitter was 14% lower, and the eye height was 59% larger than single-emphasis, indicating that our proposed configuration can be applied to the design of an output buffer circuit for higher operation speed.

• Journal of Electrical Engineering and Technology
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• v.10 no.1
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• pp.30-40
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• 2015

For a shunt power quality controller (SPQC) the DC side voltage value which is closely related to the compensation performance is a significant parameter. Buy so far, very little discussion has been conducted on this in a quantitative manner by previous publications. In this paper, a method to design the DC side voltage of SPQC is presented according to the compensation performance in the single-phase system and the three-phase system respectively. First, for the reactive current and the harmonic current compensation, a required minimal value of the DC side voltage with a zero total harmonic distortion (THD) of the source current and a unit power factor is obtained for a typical load, through the equivalent circuit analysis and the Fourier Transform analytical expressions. Second, when the DC side voltage of SPQC is lower than the above-obtained minimal value, the quantitative relationship between the DC side voltage and the THD after compensation is also elaborated using the curve diagram. Hardware experimental results verify the design method.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.5
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• pp.936-943
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• 2009

Dynamic voltage restorer(DVR) is now more preferable enhancement than other power quality enhancement in industry to reduce the impact of voltage faults, especially voltage sags to sensitive loads. The main controllers for DVR consists of PLL(phase locked loop), compensation voltage calculator and voltage compensator. PLL detects the voltage faults and phase. Compensation voltage calculator calculates the reference voltage from the source voltage and phase. With calculated compensation voltage from PLL, voltage compensator restores the source voltage. If PLL detect ideal phase, compensation voltage calculator calculates ideal compensation voltage. Therefore, PLL for DVR is very important. This paper proposes the new method of PLL in DVR. First, the power circuit of DVR system is analyzed in order to compensate the voltage sags. Based on the analysis, new PLL for improving transient response of DVR is proposed. The proposed method uses band rejection filter(BRF) at q-axis in synchronous flame. In order to calculate compensation voltage in commercial instruments, the PQR theory is used. Proposed PLL method is demonstrated through simulation using Matlab-Simulink and experiment, and by checking load voltage, confirms operation of the DVR

• Journal of Power Electronics
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• v.19 no.2
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• pp.333-343
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• 2019

Dead time and the nonideal characteristics of components all lead to phase voltage distortions. In order to eliminate the harmful effects caused by distortion, numerous methods have been proposed. The efficacy of a method mainly depends on two factors, the compensation voltage amplitude and the phase current polarity. Theoretical derivations and experiments are given to explain that both of these key factors can be deduced from the compensation time, which is defined as the error time between the ideal phase voltage duration and the actual phase voltage duration in one Pulse Width Modulation (PWM) period. Based on this regularity, a novel method for compensating phase voltage has been proposed. A simple circuit is constructed to realize the real-time feedback of the phase voltage. Utilizing the actual phase voltage, the compensation time is calculated online. Then the compensation voltage is derived. Simulation and experimental results show the feasibility and effectivity of the proposed method. They also show that the error voltage is decreased and that the waveform is improved.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.4
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• pp.669-676
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• 2012

In this paper, The method to improve the mass production method of the radar sensor is suggested by using the temperature compensation circuit which is composed with the thermister. The mass production became easier by decreasing the adjustment time for the exact oscillation frequency with the temperature compensation circuit that can support the proper gate bias voltage for the FET after the dielectric resonator is removed from the DRO(Dielectric Resonator Oscillator) of the radar sensor. Radar sensor with the proposed method has 15.67MHz oscillator frequency variation in the temperature range of $-20^{\circ}C-+55^{\circ}C$, 0.65dB magnitude variation, -105.47dBc phase noise characteristics at 1MHz which are better or similar temperature characteristics with the DRO whose oscillator frequency variation is 25MHz, magnitude variation is 0.42dB and phase noise is -107.40dBc in the same temperature range.