• Title/Summary/Keyword: Comparison circuit

Search Result 585, Processing Time 0.026 seconds

Circuit Model Analysis for Traces that Cross a DGS

  • Jung, Kibum;Lee, Jongkyung;Chung, Yeon-Choon;Choi, Jae-Hoon
    • Journal of electromagnetic engineering and science
    • /
    • 제12권4호
    • /
    • pp.240-246
    • /
    • 2012
  • This paper presents a novel modeling technique for traces that cross a defected ground structure. A simple and accurate equivalent circuit model provides clear insight into the coupling mechanism between a microstrip line and a slot or split. The circuit models consist of a transformer as the coupling mechanism and LC resonators as the ground with a slot or split structure. Resistors, capacitors, and inductors are added to the model to increase accuracy and equivalence at high frequency. Simulated and measured S-parameters are presented for defected ground structures. The accuracy and validity of the proposed equivalent circuit model is verified by evaluation of the S-parameter characteristics of the defected ground structures and comparison with measured results.

4포트 커넥터 시스템의 등가회로 변환에 관한 연구 (Equivalent Circuit Model for Four Port Connector System)

  • 심민규;김종민;나완수
    • 전기학회논문지
    • /
    • 제56권6호
    • /
    • pp.1105-1110
    • /
    • 2007
  • This paper describes an equivalent circuit modeling of 4-port connector system. A coupled transmission line was designed and fabricated, mimicking a 4-port connector system, and then S-parameters were measured using 4 port VNA (Vector Network Analyzer). The S-parameters from measurement and from Full-wave simulator coincided quite nice. By using these S parameters, an equivalent circuit parameters for a 4-port system was obtained. The time domain response from the equivalent circuit model matched to the signals, which was measured using TDR(Time Domain Reflectometry) meter. We were also convinced that there should be enough bandwidth to get a meaningful time domain result from Fourier inverse transformation of the S parameters. In addition, we applied the conversion algorithm to the 4-port connector system, which calculates the S-parameters of a 4 port system using the data from a 2-port VNA with the other ports open. Comparison of the two data, one from measurement and the other one from the conversion algorithm, was made in this manuscript.

전기화학적 임피던스 Fitting 개선을 위한 전극/전해질 계면의 전기회로 모델 연구 (A Study on the Electrical Circuit Model of the Electrode/Electrolyte Interface for Improving Electrochemical Impedance Fitting)

  • 장종현;박정호
    • 전기학회논문지
    • /
    • 제56권6호
    • /
    • pp.1087-1091
    • /
    • 2007
  • Exact impedance modeling of the electrode/electrolyte interface is important in bio-signal sensing electrode development. Therefore, the investigation of the equivalent circuit models for the interface has been pursued for a long time by several researchers. Previous circuit models fit the experimental results in limited conditions such as frequency range, type of electrode, or electrolyte. This paper describes a new electrical circuit model and its capability of fitting the experimental results. The proposed model consists of three resistors and two constant phase elements. Electrochemical impedance spectroscopy was used to characterize the interface for Au, Pt, and stainless steel electrode in 0.9% NaCl solution. Both the proposed model and the previous model were applied to fit the measured impedance results for comparison. The proposed model fits the experimental data more accurately than other models especially at the low frequency range, and it enables us to predict the impedance at very low frequency range, including DC, using the proposed model.

쾌속조형과 스크린 인쇄기술을 이용한 빌드업인쇄회로기판의 제조공정기술개발 (Development of Build-up Printed Circuit Board Manufacturing Process Using Rapid Prototyping Technology and Screen Printing Technology)

  • 조병희;정해도;정해원
    • 한국정밀공학회지
    • /
    • 제17권2호
    • /
    • pp.130-136
    • /
    • 2000
  • Generally, the build-up printed circuit board manufactured by the sequential process with etching, plating, drilling etc. requires many types of equipments and lead time. Etching process is suitable for mass production, however, it is not adequate for manufacturing prototype in the developing stage. In this study, we introduce a screen printing technology to prototyping a build-up printed circuit board. As for the material, photo/thermal curable resin and conductive paste are used for the formation of dielectric and conductor. The build-up structure is made by subsequent processes such as the formation of liquid resin thin layer, the solidification by UV/IR light, and via filling with conductive paste. By use of photo curable resin, productivity is greatly enhanced compared with thermal curable resin. Finally, the basic concept and the possibility of build-up printed circuit board prototyping are proposed in comparison with to the conventional process.

  • PDF

등가회로법에 의한 커패시터 구동 단상 유도전동기의 특성해석 (Characteristic Analysis of Capacitor Run Single-Phase Induction Motor by Equivalent Circuit Method)

  • 좌종근;김호민;김도진
    • 전기학회논문지P
    • /
    • 제60권4호
    • /
    • pp.220-226
    • /
    • 2011
  • This paper proposes a straightforward method of analyzing the operation characteristics for the capacitor run single-phase induction motor from the traditional equivalent circuit based on the revolving field theory. The proposed method consists of five procedures as follows: mechanical loss segregation, iron loss segregation and calculation of the equivalent circuit parameters, recalculation of parameters of the main winding side, calculation of the auxiliary winding magnetizing reactance and effective turn ratio, and analyzing the operation characteristics for this motor. When the characteristics are analyzed, the segregated mechanical and iron losses are considered as a loss resistance across input terminals of the equivalent circuit for the analysis. The validity of the proposed method is verified from the comparison between the computed results and the experimental ones for the operation characteristics.

Self-Power Gating Technique For Low Power Asynchronous Circuit

  • Mai, Kim-Ngan Thi;Vo, Huan Minh
    • 전기전자학회논문지
    • /
    • 제22권3호
    • /
    • pp.548-557
    • /
    • 2018
  • In this paper, Asynchronous Self-Power Gating technique (ASPG) is used to reduce consumption power in asynchronous digital watch application. The power gating control signal is automatically generated by internal system operation characteristics instead of using replica circuit delay or four-phase handshaking protocol. Isolation cell is designed to insert it between power gating domain and normal operation domain. By using self-power gating circuit, asynchronous digital watch application consumes very low power and maintains data during sleep mode. The comparison results show the proposed ASPG technique saves leakage power up to 40.47% and delay time is reduced to 71% compared to the conventional circuit.

회전기의 기여에 의한 시변성의 순간전압강하 예측에 관한 연구 (Investigation of the Estimation of Time-Varying Voltage Sags Considering the Short Circuit Contributions of Rotating Machines)

  • 윤상윤
    • 대한전기학회논문지:전력기술부문A
    • /
    • 제54권6호
    • /
    • pp.315-322
    • /
    • 2005
  • In this article, 1 would like to explore the estimation method of time-varying voltage sags in large industrial systems considering the short circuit contributions of rotating machines. For the power distribution system of KEPCO(Korea Electric Power Corporation), the magnitude of initial symmetrical short circuit current is generally not changed. However, in industrial systems which contain a number of rotating machines, the magnitude of voltage sag is generally changed from the initial to the clearing time of a fault due to the decreasing contribution of rotating machines for a fault current. The time-varying characteristics of voltage sags can be calculated using a short circuit analysis that is considered the time-varying fault currents. For this, the prediction formulations of time-varying voltage sags are proposed using a foreign standard. The proposed method contains the consideration of generator and motor effects. For the test of proposed formulations, a simple system of industrial consumer is used for the comparison conventional and proposed estimation method of voltage sag characteristics.

Design of a Low-cost Active Dry Electrode Module for Single Channel EEG Recording

  • Byeon Jong-Gil;Jin Kyung-Soo;Park Byoung-Woo
    • 대한의용생체공학회:의공학회지
    • /
    • 제26권1호
    • /
    • pp.49-54
    • /
    • 2005
  • This paper presents a design of 1-channel active dry electrode module for EEG from one's forehead. The IA(instrumentation amplifier) circuit inside the module is based on the configuration sown on the paper MettingVanRijn et al. We analyze the IA circuit to find out the related equation, and then compare its simulated characteristic with the result obtained from the real active dry electrode circuit. With the active dry electrode and the wet(Ag/AgCI) electrode connected to the separated analog processing module on one's forehead at the same time, their real time and FFT outputs of EEG are examined for comparison. The active dry electrode module has advantages over the wet electrode and its analog processing module: 1) The size of the analog processing circuit of the active dry electrode module is smaller than that of existing EEG analog processing module; 2) the total cost required to make the proposed analog processing circuit is much lower than that of the existing circuit, since the designed circuit needs smaller parts; 3) the electrical characteristic is comparable to the general EEG analog processing module even if the designed module has simpler circuit configuration.

PMIC용 고신뢰성 eFuse OTP 메모리 설계 (Design of High-Reliability eFuse OTP Memory for PMICs)

  • 양혜령;최인화;장지혜;김려연;하판봉;김영희
    • 한국정보통신학회논문지
    • /
    • 제16권7호
    • /
    • pp.1455-1462
    • /
    • 2012
  • 본 논문에서는 BCD 공정 기반으로 PMIC용 고신뢰성 24비트 듀얼 포트(dual port) eFuse OTP 메모리를 설계하였다. 제안된 dynamic pseudo NMOS 로직회로를 이용한 프로그램 데이터 비교회로는 program-verify-read 모드에서 프로그램 데이터와 read 데이터를 비교하여 PFb(pass fail bar) 핀으로 비교 결과를 출력한다. 그래서 한 개의 PFb 핀만 테스트하므로 eFuse OTP 메모리가 정상적으로 프로그램 되었는지를 확인할 수 있다. 그리고 program-verify-read 모드를 이용하여 프로그램된 eFuse 저항의 변동을 고려한 가변 풀-업 부하(variable pull-up load)를 갖는 센싱 마진 테스트 회로를 설계하였다. Magnachip $0.35{\mu}m$ BCD 공정을 이용하여 설계된 24비트 eFuse OTP 메모리의 레이아웃 면적은 $289.9{\mu}m{\times}163.65{\mu}m$($=0.0475mm^2$)이다.

분진운의 최소점화에너지에 대한 정전기 방전회로의 매개변수 영향 (Influence of Electrostatic Discharge Circuit Parameters on the Minimum Ignition Energy of Suspended Dust Clouds)

  • 문균태;정재희;미주키 야마구마;최광석
    • 한국안전학회지
    • /
    • 제25권5호
    • /
    • pp.22-26
    • /
    • 2010
  • The ignitability(minimum ignition energy, MIE) of a suspended dust clouds is very important aspect of technical safety indices. This paper reported the experimental results dealing with the influence of discharge circuit on the MIE of a suspended dust clouds. The movement of a suspended dust clouds was also observed with the high speed camera. The Hartmann vertical-tube apparatus(MIKE-3) described in the international standard of IEC and Polypropylene (PP, 50% volume-average, D50: $761{\mu}m$) resin powders were used in this experiment. The following results were obtained: (1) the MIE of a suspended PP powder depended markedly on the discharge circuit; in other words, when a resistor was connected in series with the discharge sparking circuit(RC), the lowest value(31mJ) of MIE was obtained for a suspended PP powder comparison with the other circuits(C circuit; 370mJ or LC circuit; 71mJ). (2) the discharge duration time is more important than other factors with regard to MIE of a suspended PP powder.